III-N Transistor Source Channel Heterostructure for High Frequency
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Solution Overview
Problem
As transistor dimensions are scaled for high-frequency applications, minimizing parasitic capacitance and on-state resistance becomes increasingly challenging, leading to degraded cut-off frequency (fT) and maximum oscillation frequency (fMAX) due to larger overlap capacitance, which cannot be improved beyond a practical limit by reducing gate length.
Innovation Solution
A source to channel heterostructure design is implemented in III-N transistors, where a high bandgap material layer is inserted between the source and channel, forming a heterojunction and 2DEG configuration, allowing for high-injection velocities of electrons and reducing transit time, thereby enhancing high-frequency performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate length is reduced to improve high-frequency performance, then cut-off frequency and maximum oscillation frequency can be increased, but parasitic capacitance and on-state resistance increase, leading to degraded performance
Solution Approach 1:
The patent applies local quality by creating a heterostructure with different bandgap materials (AlGaN barrier layer with higher bandgap and GaN channel layer with lower bandgap) at specific locations. This local material differentiation enables the formation of a 2DEG at the heterojunction interface, which provides high electron mobility and low on-state resistance in the channel region while allowing the gate length to be reduced without proportionally increasing parasitic capacitance. The localized heterostructure design optimizes electrical properties at critical interfaces without requiring uniform material composition throughout the entire device.
Solution Approach 2:
The patent employs composite materials by combining AlGaN and GaN layers to form a heterostructure. The AlGaN barrier layer with wider bandgap is composite with the GaN channel layer with narrower bandgap, creating a structured interface that generates high electron mobility 2DEG. This composite material approach allows simultaneous achievement of low on-state resistance and reduced parasitic capacitance effects, enabling improved cut-off frequency and maximum oscillation frequency even with reduced gate length.
2Speed
If gate length is reduced to improve high-frequency performance, then cut-off frequency and maximum oscillation frequency can be increased, but on-state resistance increases, leading to degraded performance
Solution Approach 1:
The patent applies local quality by creating a heterostructure with different bandgap materials (AlGaN barrier layer with higher bandgap and GaN channel layer with lower bandgap) at specific locations. This local material differentiation enables the formation of a 2DEG at the heterojunction interface, which provides high electron mobility and low on-state resistance in the channel region while allowing the gate length to be reduced without proportionally increasing parasitic capacitance. The localized heterostructure design optimizes electrical properties at critical interfaces without requiring uniform material composition throughout the entire device.
Solution Approach 2:
The patent employs composite materials by combining AlGaN and GaN layers to form a heterostructure. The AlGaN barrier layer with wider bandgap is composite with the GaN channel layer with narrower bandgap, creating a structured interface that generates high electron mobility 2DEG. This composite material approach allows simultaneous achievement of low on-state resistance and reduced parasitic capacitance effects, enabling improved cut-off frequency and maximum oscillation frequency even with reduced gate length.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables III-N transistors to operate at improved frequencies, such as greater than 300, 350, 400, or 450 GHz, by injecting electrons with higher velocity into the channel, thus increasing the unity current gain cut-off frequency and maximum oscillation frequency.
Implementation Method 1
a heterostructure FET (HFET) or high-electron-mobility transistor (HEMT), which is a FET incorporating a junction between two materials with different band gaps as the channel
Implementation Method 2
forming a heterojunction and 2DEG configuration, allowing for high-injection velocities of electrons
Implementation Method 3
at least one polarization charge inducing layer above the first layer
Data Source
AI summary
Techniques are disclosed for forming group III-N transistors including a source to channel heterostructure design. As will be apparent in light of this disclosure, the source to channel heterostructure design may include inserting a relatively high bandgap material layer (e.g., relative to the bandgap of the channel material) between the source and channel of the III-N transistor. In some such embodiments, the relatively high bandgap material layer may be a portion of the polarization charge inducing layer formed over the III-N layer including the channel (e.g., to form a heterojunction/2DEG configuration) that is purposefully left in the source region when forming the source/drain trenches. The source to channel heterostructure design can be used to enhance the high frequency performance of the III-N transistor. Other embodiments may be described and/or disclosed.