III-V Barrier Layer Protection for Low-Leakage p-Type Doping

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Solution Overview

Problem

Existing semiconductor manufacturing processes for III-V compound materials face challenges in reducing dopant diffusion and damage to layers, which affects the electrical performance of transistors, particularly in enhancing two-dimensional electron gas concentration and reducing leakage current.

Innovation Solution

A semiconductor device and manufacturing method involving a protection layer to cover the III-V compound barrier layer, reducing dopant diffusion and damage during p-type doped III-V compound material formation, and forming a patterned barrier layer with a reduced contact area to improve electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If p-type doped III-V compound material is formed directly on the III-V compound barrier layer, then the manufacturing process is simpler, but dopant diffusion into the barrier layer and semiconductor layer increases, degrading electrical performance

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddopant diffusion control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A protection layer is introduced as an intermediary between the p-type doped III-V compound material and the III-V compound barrier layer. This protection layer prevents direct contact and dopant diffusion while allowing the manufacturing process to proceed. The protection layer is formed, then an opening is created to expose the barrier layer, and the p-type doped material is formed only in the opening region, thereby mediating the interaction between the dopant source and the sensitive semiconductor layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier layer is segmented into covered regions (protected by the protection layer) and exposed regions (in the opening). This segmentation allows different portions of the barrier layer to have different functions: the covered portions protect against dopant diffusion, while the exposed portions allow controlled contact with the p-type doped material for desired electrical connections.

Inventive Principle:
Principle #1Segmentation

2Productivity

If p-type doped III-V compound material is formed directly on the III-V compound barrier layer, then fewer process steps are required, but damage to the barrier layer and semiconductor layer during manufacturing increases

Engineering Contradiction:
Improvenumber of process stepsVSAvoidlayer damage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The protection layer is formed in advance before the p-type doped III-V compound material is deposited. This preliminary action prepares the structure to withstand subsequent manufacturing processes by providing a protective barrier that prevents damage to the underlying sensitive layers during dopant introduction and other processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer serves as a mediator that absorbs or shields against harmful effects during manufacturing processes such as ion implantation or other damage-inducing steps. By placing this intermediary layer between the processing environment and the sensitive semiconductor layers, damage is significantly reduced.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the contact area between the patterned barrier layer and p-type doped III-V compound material is increased, then electrical connection is improved, but dopant diffusion and leakage current increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

Different regions of the device are given different properties: the opening region allows controlled contact between the patterned barrier layer and p-type doped material for necessary electrical connection, while the surrounding protected regions maintain isolation to prevent dopant diffusion and leakage current. This local differentiation of properties optimizes both electrical performance and dopant containment.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The protection layer, which initially seems to add complexity, actually converts the potential harm of dopant diffusion into a beneficial containment mechanism. By deliberately designing the protection layer with specific opening patterns, the structure that prevents damage also controls the extent of dopant contact, transforming a protective measure into a dual-function element that both protects and regulates electrical properties.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method increases the concentration of two-dimensional electron gas, enhances drain current, and lowers leakage current, thereby improving the electrical performance and manufacturing yield of semiconductor devices.

Implementation Method 1

the amount of dopants diffused from the p-type doped III-V compound material into the III-V compound barrier layer and/or the III-V compound semiconductor layer may be reduced by covering most of the III-V compound barrier layer with the protection layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

Two-dimensional electron gas (2DEG) may be generated by the piezoelectricity property of the GaN-based materials

Methodology Applied
Scientific EffectPiezoelectricity: Piezoelectric Effect

Data Source

PatentUS20240047554A1Semiconductor device and manufacturing method thereof
Publication Date: 2024.02.08 UNITED MICROELECTRONICS CORP
  • US20240047554A1 patent drawing
  • US20240047554A1 patent drawing
  • US20240047554A1 patent drawing

AI summary

A manufacturing method of a semiconductor device includes the following steps. A III-V compound barrier layer is formed on a III-V compound semiconductor layer. A protection layer is formed on the III-V compound barrier layer. An opening is formed penetrating through the protection layer in a vertical direction and exposing a part of the III-V compound barrier layer. A p-type doped III-V compound material is formed in the opening. A patterned barrier layer is formed on the p-type doped III-V compound material. A contact area between the patterned barrier layer and the p-type doped III-V compound material is less than an area of a top surface of the p-type doped III-V compound material.