Selective III-V Chiplet Transfer Using Patterned Bonding Templates
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Solution Overview
Problem
Current layer transfer techniques in semiconductor manufacturing require transferring entire layers, leading to increased costs and process complexity due to the need to etch off unneeded portions, and pick-and-place methods are costly and complex for handling small or non-standard chiplets.
Innovation Solution
Selective layer transfer techniques using a patterned bonding template and selective release technology to transfer specific areas of a layer from a donor substrate to a receiver substrate, allowing reuse of the donor substrate and eliminating the need for etching or post-attach thinning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If blanket layer transfer is used, then the entire layer can be transferred, but unneeded portions must be etched off increasing costs and process complexity
Solution Approach 1:
The patent divides the layer transfer process into selective segments by introducing a patterned bonding template that defines specific transfer regions. This allows only the needed portions of the layer to be transferred, eliminating the need to etch off unneeded portions and reducing process complexity while maintaining transfer completeness for the required areas.
Solution Approach 2:
The bonding template creates local adhesive properties in specific regions, making the transfer process selective to particular areas. This local quality approach enables precise control over which portions of the layer are transferred, avoiding the need for post-transfer etching and reducing overall process complexity.
2Adaptability or versatility
If pick-and-place methods are used for small or non-standard chiplets, then specific components can be transferred, but the process becomes costly and complex
Solution Approach 1:
The bonding template is segmented into adhesive and non-adhesive regions that correspond to the specific chiplet locations needed on the receiver substrate. This segmentation allows multiple small or non-standard chiplets to be transferred in a single batch process rather than requiring individual pick-and-place operations, reducing handling complexity and cost while maintaining flexibility.
Solution Approach 2:
The patent combines multiple chiplet transfers into a single batch process by using a patterned bonding template that defines all transfer locations simultaneously. This merging of operations eliminates the need for sequential pick-and-place handling, reducing both cost and complexity while maintaining the ability to handle small and non-standard chiplet geometries.
3Ease of manufacture
If full layer transfer is performed, then no selective release is needed, but the donor substrate cannot be reused and waste increases
Solution Approach 1:
The patent extracts only the needed portions of the layer from the donor substrate by using a patterned bonding template with adhesive regions that correspond to the desired transfer areas. The non-adhesive regions allow the layer to remain on the donor substrate, enabling substrate reuse and reducing waste while maintaining manufacturing simplicity through a single transfer operation.
Solution Approach 2:
The bonding template selectively discards only the portions of the layer that need to be transferred, while recovering and retaining the remaining portions on the donor substrate for reuse. This selective discarding approach minimizes substrate waste and enables cost-effective manufacturing by allowing the expensive donor substrate to be used multiple times.
Data Source
AI summary
Methods of selectively transferring integrated circuit (IC) components between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of IC components over the release layer is received, and a second substrate with one or more adhesive areas is received. The layer of IC components may include one or more transistors that contain one or more group III-V materials. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.


