III-V Fin on Insulator Semiconductor Structure
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Solution Overview
Problem
The continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) is reaching scaling limits, necessitating new methods to enhance performance beyond traditional scaling, particularly through the use of high mobility III-V compound semiconductor materials in non-planar semiconductor devices like FinFETs.
Innovation Solution
A method of forming a semiconductor structure with a III-V compound semiconductor channel fin on a dielectric material, involving a III-V material stack on a bulk semiconductor substrate, patterning to create pre-fin structures, suspending the channel layer using pre-pad structures, filling gaps with dielectric material, and performing a fin cutting process to separate the structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional MOSFET scaling is continued, then device miniaturization is achieved, but performance improvement becomes difficult due to reaching scaling limits
Solution Approach 1:
The patent changes the material parameter by introducing III-V compound semiconductor materials (such as InGaAs) with higher electron mobility than traditional silicon, thereby improving carrier transport properties and device performance despite continued miniaturization. This material substitution allows performance enhancement without relying solely on dimensional scaling.
2Reliability
If III-V compound semiconductor materials are used in FinFETs, then drive current and mobility are improved, but manufacturing complexity increases due to suspended structure requirements
Solution Approach 1:
The patent applies preliminary action by forming anchor structures (pad structures) before creating the suspended fin structure. These pre-formed anchors provide attachment points that simplify the subsequent suspension process and ensure proper structural formation, thereby reducing the actual manufacturing complexity despite the advanced suspended configuration.
Solution Approach 2:
The manufacturing process is segmented into distinct stages: forming pad structures with anchors, creating the III-V material stack, suspending the channel layer, and forming dielectric gaps. This segmentation allows each complex step to be independently optimized and controlled, making the overall complex structure manufacturable through systematic process breakdown.
3Ease of manufacture
If fin structures are formed on bulk semiconductor substrates, then integration is simplified, but short channel effects are worsened compared to insulator-based structures
Solution Approach 1:
The patent introduces a dielectric material as an intermediary layer between the III-V fin structure and the bulk semiconductor substrate. This dielectric gap acts as a mediator that electrically isolates the fin from the substrate, reducing parasitic capacitance and short channel effects while maintaining the integration benefits of substrate-based fabrication.
Data Source
AI summary
A method of forming a semiconductor structure in which a III-V compound semiconductor channel fin portion is formed on a dielectric material is provided. The method includes forming a III-V material stack on a surface of a bulk semiconductor substrate. Patterning of the III-V material stack is then employed to provide a pre-fin structure that is located between, and in contact with, pre-pad structures. The pre-pad structures are used as an anchoring agent when a III-V compound semiconductor channel layer portion of the III-V material stack and of the pre-fin structure is suspended by removing a topmost III-V compound semiconductor buffer layer portion of the material stack from the pre-fin structure. A dielectric material is then formed within the gap provided by the suspending step and thereafter a fin cut process is employed.