III-V Fin Structures via Silicon Mandrel Segmentation

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Solution Overview

Problem

The challenge lies in fabricating high-quality III-V fin structures, particularly due to difficulties in growing III-V compound semiconductor films on dissimilar substrates with different lattice constants and thermal expansion coefficients, which hinders the integration of III-V materials into advanced transistor designs.

Innovation Solution

A method involving the use of fins as mandrels, where a group III-V material layer is conformally deposited, planarized, and then segmented into U-shaped structures, ultimately forming III-V fin structures with smaller pitch, utilizing STIs and isolating structures to achieve precise alignment and isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If III-V compound semiconductor films are grown on dissimilar substrates, then high electron mobility is achieved, but lattice mismatch and thermal expansion differences cause poor film quality and high manufacturing difficulty

Engineering Contradiction:
Improvefilm qualityVSAvoidmanufacturing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses silicon fins as intermediary mandrels to grow III-V materials. The fins serve as a bridge between the silicon substrate and the III-V compound semiconductor, allowing epitaxial growth while managing lattice mismatch through the controlled fin structure and buffer layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the III-V material layer into discrete fin structures by using self-aligned etching processes. The mandrel fins are selectively removed to create isolated III-V fins, enabling precise control over material placement and reducing the impact of lattice mismatch across the entire substrate.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If fins are used as mandrels for III-V material deposition, then precise alignment and smaller pitch are achieved, but process complexity increases

Engineering Contradiction:
Improvealignment precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs self-aligned processes where the fin structures automatically define the positions of subsequent layers. The mandrel fins serve as self-aligned masks for etching, and the III-V material deposition is automatically positioned relative to the fins, eliminating the need for additional alignment steps.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent performs preliminary formation of silicon fins and STI structures before III-V material deposition. These pre-formed structures serve as templates and mandrels that guide subsequent processing steps, ensuring precise final alignment without requiring complex real-time alignment procedures.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If integration density is increased through smaller pitch fins, then transistor drive current is improved, but manufacturing cost and process difficulty increase

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent makes the silicon fin structures serve multiple functions: as mechanical support, as alignment masks, as etch stop layers, and as templates for III-V material growth. This multi-functionality reduces the number of separate process steps and components needed, lowering overall manufacturing complexity despite high integration density.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of high-quality III-V fin structures with improved integration density and reduced manufacturing costs, enhancing transistor performance by leveraging the high electron mobility of III-V materials.

Implementation Method 1

a deposition process is performed to conformally form a group III-V material layer encapsulating an upper portion of each of the fins and covering the STIs

Methodology Applied
Scientific EffectConformal deposition: Chemical Vapour Deposition

Data Source

PatentUS10062577B1Method of fabricating III-V fin structures and semiconductor device with III-V fin structures
Publication Date: 2018.08.28 UNITED MICROELECTRONICS CORP
  • US10062577B1 patent drawing
  • US10062577B1 patent drawing
  • US10062577B1 patent drawing

AI summary

A method of fabricating III-V fin structures includes providing numerous fins. Then, a group III-V material layer is formed to encapsulate an upper portion of each of the fins. Later, part of the group III-V material layer is removed to expose an end of each of the fins, and divides the group III-V material layer into numerous U-shaped structures. Next, a first part of each of the fins and the entire silicon oxide layer are removed. Finally, part of each of the U-shaped structures is removed to segment each of the U-shaped structures into two III-V fin structures.