III-V HEMT Isolation Structure for High-Voltage Half-Bridge Circuits
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Solution Overview
Problem
Monolithically integrated high-electron-mobility transistors (HEMTs) in semiconductor devices face electrical isolation issues at high voltages and frequencies due to insufficient substrate isolation, leading to device failure in half-bridge circuits.
Innovation Solution
A semiconductor device with electrically isolated device areas on a type IV semiconductor substrate, featuring type III-V semiconductor material regions and voltage blocking devices formed by masked dopant implantation and epitaxial layers to maintain electrical isolation and prevent substrate charging, thereby reducing source-substrate voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If HEMT devices are monolithically integrated on a common substrate to reduce size and cost, then device integration density is improved, but electrical isolation between devices deteriorates at high voltages and frequencies
Solution Approach 1:
The substrate is segmented into multiple electrically isolated device areas using voltage blocking devices. Each device area is separated by p-n junctions that prevent electrical interaction between adjacent HEMT devices, allowing high-density integration while maintaining reliable electrical isolation at high voltages and frequencies.
Solution Approach 2:
Voltage blocking devices serving as intermediary structures are introduced between adjacent device areas. These p-n junction-based blocking devices act as electrical barriers that prevent substrate charging and maintain isolation between HEMT devices, enabling monolithic integration without compromising electrical isolation performance.
2Reliability
If voltage blocking devices are formed using masked dopant implantation and epitaxial layers, then electrical isolation is improved, but device complexity increases
Solution Approach 1:
Voltage blocking devices are formed preliminarily during the substrate preparation stage using masked dopant implantation and epitaxial growth. The p-n junction structures are created before HEMT device fabrication, establishing electrical isolation boundaries in advance and simplifying subsequent device processing steps.
Solution Approach 2:
The electrical properties of substrate regions are changed through controlled dopant implantation and epitaxial growth to create p-n junctions. By modifying dopant concentration and distribution parameters, voltage blocking devices are formed that provide reliable electrical isolation while maintaining compatibility with standard semiconductor fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively isolates high-electron mobility transistors from the substrate, maintaining low source-substrate voltage differences and preventing device failure at high voltages and frequencies, ensuring reliable operation of half-bridge circuits.
Implementation Method 1
The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device
Implementation Method 2
A high-electron mobility transistor integrally formed in the first region of type III-V semiconductor material... configured to control a conductive connection between the respective source and drain terminals
Implementation Method 3
An HEMT is a transistor with a channel region formed by a heterojunction between two materials having different band gaps... HEMTs are well suited for power switching applications... due to their high voltage blocking capability
Data Source
AI summary
A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.