III-V Transistor Pulse Characterization With Dynamic Trap Conditioning
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Solution Overview
Problem
Existing pulsed-mode IV measurement techniques for III-V semiconductor transistors fail to account for the dynamic variation of trap charge states under operating conditions, leading to inaccurate modeling and performance degradation in microwave applications.
Innovation Solution
A method involving a variable RF pre-pulse applied to the gate, followed by DC pulses to the gate and drain, with predefined power and duration variations to dynamically modify trap charge states, allowing precise measurement and modeling of the transistor's IV network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a fixed-level RF pre-pulse is applied in dual-pulse systems, then the trap charge state is fixed across the entire IV network, but the dynamic effects of traps within the transistor cannot be considered
Solution Approach 1:
The patent applies the dynamics principle by making the RF pre-pulse power level variable rather than fixed. The power level of the RF pre-pulse is dynamically adjusted according to a predetermined variation law that corresponds to different regions of the IV characteristic being explored. This allows the trap charge state to be dynamically modified to match the actual operating conditions, resolving the contradiction between stability and adaptability.
2Device complexity
If standard two-level pulsed measurement technique is used, then the measurement process is simple, but the dynamic variation of trap charge states under operating conditions is not accounted for
Solution Approach 1:
The patent applies the preliminary action principle by introducing an RF pre-pulse that is applied before the main measurement pulses. This pre-pulse conditions the trap charge state to match the actual operating conditions of the transistor in its final application. By preparing the trap charge state in advance according to a predetermined variation law, the measurement accurately reflects dynamic trap effects without requiring complex real-time adjustments during the measurement process.
3Adaptability or versatility
If bias points far from Vgs0 = 0V and Vds0 = 0V are used, then the IV network exploration covers practical operating conditions, but trap effects cause performance degradation
Solution Approach 1:
The patent applies the parameter changes principle by dynamically adjusting the RF pre-pulse power level according to a predetermined variation law that corresponds to different regions of the IV characteristic. As the measurement sweeps through different bias points and IV regions, the RF pre-pulse power is modified to reflect the actual operating conditions at each point. This allows accurate characterization of trap effects across the entire IV network while accounting for their impact on transistor performance under various operating conditions.
Data Source
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AI summary
The present invention relates to a method for characterizing in pulse mode a III-V semiconductor transistor (2) and to an associated test bed (1), in which method and bed an RF pre-pulse is applied to the gate (2a) of the transistor (2) with a power level NRF defined according to a first predetermined relationship so as to set the state of charge of traps in the transistor (2), then a first DC pulse and a second DC pulse are applied to the gate (2a) and to the drain (2b) of the transistor (2), respectively, the first DC pulse and the second DC pulse having a first DC level N1 and a second DC level N2 defined according to a second predetermined relationship, respectively.