III-V Semiconductor Structure with Selective Regrowth
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Solution Overview
Problem
Existing semiconductor structures, such as AlGaN/GaN HEMTs, face challenges with high contact resistance, difficulty in controlling etch depth, plasma damage, and poor passivation, leading to inadequate threshold voltage and leakage current issues, which hinder their performance in enhancement-mode operation.
Innovation Solution
A semiconductor structure with a III-V epitaxial layer stack and a protection layer stack that includes a III-V evaporation layer, an etch stop layer, and a mask layer, allowing for selective and epitaxial regrowth of p-type AIGaN in the gate region, providing excellent passivation and precise control over etching, thereby reducing leakage current and improving threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If selective regrowth of n-type doped GaN is performed to reduce contact resistance, then contact resistance is reduced, but the surface passivation is deteriorated due to removal of protection layers
Solution Approach 1:
The protection layer stack is divided into three distinct layers: a first protection layer (AlGaN barrier), a second protection layer (etched stop layer), and a third protection layer (mask layer). This segmentation allows selective removal of specific layers in contact regions while maintaining protection in other areas, enabling regrowth where needed while preserving passivation where required.
Solution Approach 2:
The protection layers are selectively removed only in the contact regions where regrowth is desired, while maintaining the full protection stack in gate and channel regions. This local modification approach applies different properties (protected vs. unprotected) to different parts of the same structure, reducing contact resistance locally without compromising overall device passivation.
2Ease of operation
If p-type AIGaN layer is grown everywhere and then removed in extrinsic areas, then enhancement mode operation is achieved, but etch depth control becomes difficult and plasma damage occurs
Solution Approach 1:
The etch stop layer is deposited beforehand as part of the protection layer stack, positioned between the AlGaN barrier and the mask layer. This preliminary placement of a layer with known etch selectivity provides a predetermined termination point for the etching process, ensuring precise depth control and preventing over-etching that would cause plasma damage to underlying layers.
Solution Approach 2:
The etch stop layer acts as an intermediary between the AlGaN barrier layer and the substrate, providing a controlled interface for the etching process. This intermediate layer mediates the etching action by offering a distinct etch termination point, allowing precise removal of material without affecting deeper layers, thus preventing plasma damage.
3Reliability
If the protection layer stack is used for selective regrowth, then passivation is improved and etching control is precise, but the device complexity increases
Solution Approach 1:
The protection layer stack serves multiple functions simultaneously: it provides surface passivation during processing, acts as a mask for selective regrowth, and includes an etch stop layer for precise depth control. By combining these functions into a single integrated structure, the patent avoids the need for separate processing steps for each function, thereby reducing overall process complexity despite the additional layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a semiconductor structure with significantly reduced leakage current, improved gate reliability, and a suitably positive threshold voltage, enabling superior dynamic performance and enhanced passivation, thus overcoming the limitations of existing technologies.
Implementation Method 1
wherein the III-V evaporation layer is evaporated in the gate region and/or the source and drain regions, thereby exposing the second active III-N layer
Implementation Method 2
a gate comprising a III-V material, said gate being selectively and epitaxially re-grown through the protection layer stack on the exposed second active III-V layer in the gate region
Data Source
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AI summary
A semiconductor III-V structure comprising: - a substrate; - an epitaxial III-N semiconducting layer stack comprising a two dimensional Electron Gas; - a protection layer stack for the active layer comprising: ∘ a III-V evaporation layer; ∘ a III-V etch stop layer on top of the evaporation layer; and ∘ a mask layer on top of the III-V etch stop layer; wherein said semiconductor III-V structure further comprises: - a gate selectively and epitaxially re-grown through said protection layer stack in a gate region; and/or - a source selectively and epitaxially re-grown through said protection layer stack in a source region and a drain selectively and epitaxially re-grown through said protection layer stack in a drain region.