III-V on Silicon Laser Transfer for Precise Waveguide Alignment

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Solution Overview

Problem

The integration of III-V dies on silicon substrates for laser devices is challenging due to issues such as low alignment tolerances, high packaging costs, coupling losses, unwanted back-reflections, and thermal isolation, which hinder efficient and reliable light emission in silicon photonics.

Innovation Solution

A method involving a carrier substrate with a grating structure, where a III-V die is bonded and then transferred to a silicon substrate, allowing for precise alignment and embedding of the die with a photonic structure, such as a silicon waveguide, to facilitate efficient light coupling and high throughput processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If external III-V die assembly is used, then ease of manufacture is improved, but manufacturing precision deteriorates due to low alignment tolerances

Engineering Contradiction:
Improveease of manufactureVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary bonding process where the III-V die is first bonded to a carrier substrate, then transferred to the silicon substrate. This intermediary step allows for precise alignment and bonding without requiring direct alignment between the III-V die and silicon substrate, thereby maintaining manufacturing precision while simplifying the overall manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary bonding of the III-V die to the carrier substrate before final transfer to the silicon substrate. This preliminary action allows for preparation and alignment to be completed in advance, ensuring high precision positioning while simplifying the final integration step.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If heterogeneous wafer/die bonding is used, then manufacturing precision is improved, but productivity deteriorates due to pick and place process

Engineering Contradiction:
Improvealignment precisionVSAvoidthroughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges multiple operations into a single integrated process. The III-V die is bonded to the carrier substrate along with the grating structure in one step, and then transferred together in another step. This eliminates the need for separate pick-and-place operations for each die, significantly improving throughput while maintaining alignment precision through the carrier substrate approach.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The carrier substrate serves as an intermediary that enables batch processing. Multiple III-V dies can be bonded and transferred simultaneously on the same carrier substrate, transforming a sequential low-throughput process into a parallel high-throughput process while maintaining precise alignment through the carrier substrate's grating structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If III-V on silicon heteroepitaxy is used, then ease of manufacture is improved, but manufacturing precision deteriorates due to thick buffer layers

Engineering Contradiction:
Improveease of manufactureVSAvoidcoupling precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent extracts the III-V die from the heteroepitaxy growth process and uses it as a separate component that is bonded to the silicon substrate. This eliminates the need for thick buffer layers required in heteroepitaxy for dislocation filtering, thereby improving coupling precision between the III-V active region and silicon photonic devices while maintaining ease of manufacture through standardized die bonding processes.

Inventive Principle:
Principle #2Taking out (Extraction)

4Ease of manufacture

If heterogeneous integration with oxide thermal isolation is used, then ease of manufacture is improved, but reliability deteriorates due to thermal isolation

Engineering Contradiction:
Improveease of manufactureVSAvoidlaser performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts the thermal management function from the bonding interface by using direct bonding between the III-V die and silicon substrate without oxide layers. This eliminates thermal isolation, allowing efficient heat dissipation from the laser diode to the silicon substrate, thereby improving laser performance and reliability while maintaining ease of manufacture through direct bonding processes.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the processing of III-V on silicon lasers, eliminates the need for individual die alignment, and enhances laser performance by ensuring accurate alignment and efficient light confinement, thereby improving throughput and reliability.

Implementation Method 1

forming a grating structure on the carrier substrate, wherein the grating structure delimits a cavity on a surface of the carrier substrate

Methodology Applied
Scientific EffectDiffraction: Diffraction

Implementation Method 2

forming a grating structure on the carrier substrate, wherein the grating structure delimits a cavity on a surface of the carrier substrate

Methodology Applied
Scientific EffectInterference: Interference

Implementation Method 3

bonding an exposed side of the die to the silicon substrate

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 4

forming a photonic structure, preferably a structure formed from a material with high refractive index, such as a silicon waveguide, above the die

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Implementation Method 5

the die comprises an active region from at least one III-V semiconductor material

Methodology Applied
Scientific EffectStimulated emission: Laser

Data Source

PatentEP3923424B1Method for processing a laser device
Publication Date: 2024.07.24 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • EP3923424B1 patent drawingFigure 1a)~1d)
  • EP3923424B1 patent drawingFigure 1e)~1h)
  • EP3923424B1 patent drawingFigure 1i)~1l)

AI summary

The invention relates to a method for processing a laser device (10), in particular a III-V on silicon laser, comprising: - providing a carrier substrate (11); - forming a grating structure (12) on the carrier substrate (11), wherein the grating structure (12) delimits a cavity (13) on a surface of the carrier substrate (11); - placing a die (16) in the cavity (13) and bonding the die (16) to the carrier substrate (11), wherein the die (16) comprises an active region (17) from at least one III-V semiconductor material; - transferring the die (16) from the carrier substrate (11) to a silicon substrate (18) by bonding an exposed side of the die (16) to the silicon substrate (18) and subsequently debonding the carrier substrate (11) from the die (16); - forming at least one material layer (22, 24, 25) on the die so that the die (16) is fully covered; and - forming a photonic structure (21), preferably a silicon waveguide, above the die (16).