III-V Thin Film Growth on SOI With Defect-Confined Lateral Trenches

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Solution Overview

Problem

Current methods for growing III-V compound semiconductors on silicon-on-insulators face challenges such as crystalline defects and dislocation issues, which hinder the integration of high-quality III-V materials with Si-based optoelectronic devices, particularly in achieving bufferless and dislocation-free structures on larger scales suitable for practical applications like Si photonics.

Innovation Solution

A method involving a layered substrate with patterned mask layers and anisotropic wet etching to form lateral trenches with {111}-oriented Si seed surfaces, allowing for selective lateral growth of epitaxial III-V compound semiconductors using MOCVD, resulting in non-defective portions on the buried oxide layer while confining defects, enabling dislocation-free III-V nano/micro structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If blanket epitaxial growth of III-V materials on Si wafers is used, then large-area coverage is achieved, but crystalline defects and dislocations propagate through the entire structure

Engineering Contradiction:
Improvecoverage areaVSAvoidcrystalline quality
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the growth area by using patterned masks to define specific regions where III-V materials are grown only in certain areas (e.g., around contact holes or in inter-router spaces) rather than blanket coverage. This segmentation allows large-area substrates to be processed while maintaining high crystalline quality in the specific grown regions by confining defects to mask edges and non-growth areas.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If thick buffer layers are used to reduce dislocation density, then crystalline quality improves, but device interconnection becomes difficult

Engineering Contradiction:
Improvecrystalline qualityVSAvoidinterconnection difficulty
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts or removes the need for thick buffer layers by using thin-film epitaxial growth combined with defect filtering techniques. The patterned growth approach allows defects to be confined to specific regions (mask edges, trench walls) while the device regions maintain high crystalline quality without requiring thick buffering, thus enabling direct device interconnection.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces patterned masks and trench structures as intermediary elements that act as defect filters. These intermediaries capture and confine crystalline defects at their interfaces while allowing the III-V material to grow with high quality in the desired device regions, eliminating the need for thick buffer layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If selective area growth is used to produce dislocation-free structures, then crystalline quality improves, but nano-scale dimensions limit practical applications

Engineering Contradiction:
Improvecrystalline qualityVSAvoidstructure size
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The patent transitions from two-dimensional planar growth to three-dimensional vertical growth within patterned trenches and around contact holes. This dimensional change allows the formation of high-aspect-ratio structures with excellent crystalline quality that can serve as effective defect filters while providing sufficient volume for practical optoelectronic device applications.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Ease of manufacture

If conventional epitaxial growth on bulk Si is used, then manufacturing simplicity is maintained, but integration with Si-based optoelectronic devices is limited

Engineering Contradiction:
Improveprocess simplicityVSAvoidintegration capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by using patterned masks to create spatially varying growth conditions on the Si substrate. Different regions have different properties: some areas have III-V material grown with specific orientations and thicknesses, while other areas remain as bare Si or have different mask configurations. This enables simultaneous optimization for both manufacturing simplicity (using standard Si substrates) and integration capability (with patterned III-V regions for optoelectronic devices).

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the growth of high-quality, dislocation-free III-V alloys on SOI platforms, facilitating direct integration with Si-based optoelectronic devices and providing strong mode confinement, suitable for various dimensions and chemical compositions, enhancing the performance and integration of III-V materials in Si photonics.

Implementation Method 1

etching each lateral Si surface of each lateral trench by anisotropic wet etching thereby forming one or more {111}-oriented Si seed surfaces

Methodology Applied
Scientific EffectAnisotropic wet etching:

Implementation Method 2

growing an epitaxial layer of the III-V compound semiconductor laterally within its respective lateral trench by metal organic chemical vapor deposition

Methodology Applied
Scientific EffectMetal organic chemical vapor deposition: Chemical Vapour Deposition

Implementation Method 3

growing an epitaxial layer of the III-V compound semiconductor laterally within its respective lateral trench by metal organic chemical vapor deposition thereby forming one or more epitaxial layers between the buried oxide layer and the patterned mask layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS11742203B2Method for growing III-V compound semiconductor thin films on silicon-on-insulators
Publication Date: 2023.08.29 THE HONG KONG UNIV OF SCI & TECH
  • US11742203B2 patent drawing
  • US11742203B2 patent drawing
  • US11742203B2 patent drawing

AI summary

The present disclosure relates to a method for growing III-V compound semiconductors on silicon-on-insulators. Starting from {111}-oriented Si seed surfaces between a buried oxide layer and a patterned mask layer, the III-V compound semiconductor is grown within lateral trenches by metal organic chemical vapor deposition such that the non-defective portion of the III-V compound semiconductor formed on the buried oxide layer is substantially free of crystalline defects and has high crystalline quality.