Image Processing Array With Multi-Path Relay for Low-Latency Warp Computing

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Solution Overview

Problem

There is a growing need for high throughput, low footprint image processors to support camera-based driver assistance systems and autonomous vehicles, which require efficient image processing of multiple image frames.

Innovation Solution

An image processor with an array of processing units that calculates warp results by receiving weights and neighboring source pixel values, relaying intermediate results, and using a gather unit with a content addressable memory cache to fetch neighboring source pixels, enabling parallel warp computing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If an image processor is designed to handle multiple image frames with high throughput, then processing speed and capacity improve, but device complexity and footprint increase

Engineering Contradiction:

Improveimage processing throughputVSAvoidprocessor footprint

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The image processor is divided into multiple independent processing units (PUs) arranged in an array, where each PU can independently process different regions or frames of images. This segmentation allows parallel processing of multiple image frames simultaneously, achieving high throughput while keeping each individual PU simple and compact, thus resolving the contradiction between throughput and device footprint.

Inventive Principle:

Principle #1Segmentation

2Productivity

If multiple processing units are added to increase parallel processing capability, then throughput improves, but data relay complexity and latency increase

Engineering Contradiction:

Improveparallel processing capabilityVSAvoiddata relay latency

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

Adjacent processing units share common data paths and relay channels, merging their data transmission resources. This allows multiple PUs to efficiently share the same physical infrastructure for data relay, reducing the overall number of dedicated connections needed and minimizing relay latency while maintaining high parallel processing capability.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

Shared memory structures and buffer units act as intermediaries between processing units, enabling efficient data exchange without requiring direct point-to-point connections between all PUs. This intermediary approach reduces the complexity of data routing and minimizes relay latency by providing centralized data access points.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12499078B2Image processing array with multi-path relay channel for relaying data between relay ports of data processors

Publication Date: 2025.12.16 MOBILEYE VISION TECH LTD

AI summary

A method of calculating warp results, the method may include executing, for each target pixel out of a group of target pixels, a warp calculation process that comprises: receiving, by a first group of processing units of an array of processing units, a first weight and a second weight associated with the target pixel; receiving, by a second group of processing units of the array, values of neighboring source pixels associated with the target pixel; calculating, by the second group, a warp result based on it response to values of the neighboring source pixels and the pair of weights; and providing the warp result to a memory module.