Image Processing Cache Management via Overlapping Stripe Segmentation

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Solution Overview

Problem

The increasing amount of image data captured by image sensors in devices such as digital cameras and smartphones leads to higher power consumption and reduced operating time, as well as inefficient cache usage in image processing systems, due to the need for more extensive processing and storage of image frames and metadata.

Innovation Solution

The solution involves dividing image frames into overlapping vertical sections or 'stripes' for efficient processing, where overlapping sections are stored in a cache for reduced read operations from memory, and metadata is managed to minimize cache usage by invalidating it after processing is complete, and using a reference frame's motion vector to determine when to invalidate cached data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If image frames are processed using multiple processing blocks to enhance image quality, then image processing quality is improved, but power consumption increases

Engineering Contradiction:
Improveimage processing qualityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The image frame is divided into multiple vertical sections or stripes for processing. Each stripe can be processed independently by different processing blocks, allowing parallel processing that improves image quality while managing power consumption through selective activation of processing blocks based on cache availability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Overlapping sections of stripes are pre-loaded into cache memory before processing. This preliminary action ensures that when processing blocks need to access these sections, the data is already in fast cache memory, reducing processing time and power consumption while maintaining high image processing quality

Inventive Principle:
Principle #10Preliminary action

2Speed

If overlapping sections of stripes are stored in cache for efficient processing, then processing speed is improved, but cache usage increases

Engineering Contradiction:
Improveprocessing speedVSAvoidcache usage
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

Only overlapping sections of stripes are stored in cache memory, not entire stripes. This localized caching approach stores data only where it is needed by multiple processing blocks, improving processing speed while minimizing cache usage by avoiding redundant storage of non-overlapping sections

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Cached overlapping sections are invalidated and removed from cache after they have been processed by all dependent processing blocks. This ensures cache space is reclaimed for subsequent processing operations, maintaining high processing speed while controlling cache usage through dynamic allocation and deallocation

Inventive Principle:
Principle #34Discarding and recovering

3Measurement precision

If metadata is retained in cache for multiple resolution processing, then processing accuracy is improved, but cache retention time increases

Engineering Contradiction:
Improveprocessing accuracyVSAvoidcache retention time
Core Design Contradiction:
Measurement precisionVSDuration of action of stationary object

Solution Approach 1:

The cache retention time for metadata is made dynamic rather than static. Metadata associated with stripes at a first resolution is retained in cache only until all stripes at a second resolution that depend on it are processed. This dynamic retention policy ensures processing accuracy by keeping metadata available when needed, while minimizing cache retention time to free space for subsequent processing operations

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240428368A1Efficient cache usage in an image processing system
Publication Date: 2024.12.26 QUALCOMM INC
  • US20240428368A1 patent drawing
  • US20240428368A1 patent drawing
  • US20240428368A1 patent drawing

AI summary

This disclosure provides systems, methods, and devices for image signal processing that support efficient cache usage in an image processing system. In a first aspect, a method of image processing includes storing, by an image processor, a first portion of a first stripe of a first frame in a cache, the first portion of the first stripe overlapping a second portion of a second stripe of the first frame, reading, by the image processor, a third portion of the second stripe from a memory, reading, by the image processor, the first portion of the first stripe from the cache, and processing, by the image processor, the second stripe using the first portion of the first stripe and the third portion of the second stripe. Other aspects and features are also claimed and described.