Image Data Clock Conversion Serial Transmission Wiring Reduction
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Solution Overview
Problem
High-resolution image data transmission, such as 4K resolution, faces challenges due to the need for increased transfer rates and the impracticality of connecting processing units with numerous lines for parallel data transmission, which complicates efficient data transfer within devices.
Innovation Solution
An information processing device and method that converts parallel image data into serial data using clock conversion units, serial and parallel conversion units, and a synchronized data generation unit, allowing for efficient transmission with a reduced wiring pattern, even for high-pixel data, by converting image data into a specific clock cycle, serial data, and then back to parallel data synchronized with the original clock cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If parallel data transmission is used for high-resolution image data, then transmission speed is improved, but device complexity and wiring requirements increase significantly
Solution Approach 1:
The patent divides high-resolution image data into multiple blocks and transmits them sequentially through a single transmission line. Instead of transmitting all pixels in parallel simultaneously, the image data is segmented into manageable chunks that are transmitted in a time-division multiplexed manner, reducing the number of physical transmission lines required while maintaining overall transmission speed.
Solution Approach 2:
The patent transitions from spatial parallelism (multiple lines transmitting data simultaneously) to temporal parallelism (single line transmitting data at different time intervals). By changing the dimension of data transmission from spatial to temporal, the system achieves high-speed transmission without requiring proportionally high wiring complexity.
2Manufacturing precision
If the number of pixels in image data is increased for higher resolution, then image quality is improved, but the transfer rate and data volume increase making transmission challenging
Solution Approach 1:
The patent segments high-resolution image data into multiple blocks and transmits them sequentially through a single transmission line. This approach allows the system to handle high pixel counts without requiring proportional increases in transmission bandwidth, as each block is transmitted independently over time rather than requiring simultaneous parallel transmission of all pixels.
Solution Approach 2:
The patent performs preliminary processing of high-resolution image data by dividing it into transmittable blocks before transmission. This pre-segmentation allows the transmission system to prepare and send data in manageable units, improving transmission efficiency for high-resolution images without requiring the entire image to be transmitted as a single large data stream.
3Speed
If 4K image data is divided into 4 pieces for transmission, then transfer rate per cable is reduced to HD levels, but the number of connection cables and processing complexity increase
Solution Approach 1:
The patent merges the function of multiple parallel transmission lines into a single transmission line by using time-division multiplexing. Instead of requiring 4 separate cables for 4K transmission, the system combines the transmission channels and alternates data transmission for different image blocks through the single cable, reducing connection complexity while maintaining the ability to transmit high-resolution data.
Solution Approach 2:
The patent makes a single transmission cable perform the function that previously required multiple cables. By implementing time-division multiplexing, the single cable can transmit different blocks of 4K image data at different time intervals, making it universally capable of handling high-resolution transmission without requiring dedicated cables for each data stream.
Data Source
AI summary
There is provided an information processing device including N first clock conversion units (N is an integer) that convert image data as parallel data into image data having a specific clock cycle, a serial conversion unit that converts N pieces of the converted image data into one-system serial data and outputs the converted data, a parallel conversion unit to which the converted image data is input and that converts the data into N pieces of parallel data having a predetermined number of bits, a synchronized data generation unit that generates synchronized data of the image data, and N second clock conversion units that reconvert the N pieces of converted image data to an original clock cycle from the specific clock cycle and set the clock cycle of the converted image data to be in a phase in synchronization with the synchronized data generated by the synchronized data generation unit.