High-Resolution Image and Depth Map Alignment Using Sub-Image Decomposition
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Solution Overview
Problem
Existing methods for aligning high-resolution RGB images and depth maps on embedded platforms with low-bit-width floating-point representation are inefficient due to accuracy issues and increased cost or time consumption when using processors with larger floating-point mantissa.
Innovation Solution
A processor-based system that decomposes high-resolution images into sub-images, calculates alignment matrices, and performs matrix operations to achieve accurate alignment using low-bit-width floating-point representation without losing accuracy, enabling faster alignment and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the existing depth alignment algorithm is implemented on embedded platform with low-bit-width floating-point arithmetic unit, then the device cost is reduced, but the alignment accuracy deteriorates and the depth image appears at incorrect pixel coordinates
Solution Approach 1:
The patent divides the high-resolution image and depth map into multiple sub-images, each processing of which can be completed with low-bit-width floating-point representation. This segmentation allows the system to maintain accuracy while using limited computational resources of embedded processors.
Solution Approach 2:
The patent transforms the problem from direct high-resolution alignment to a multi-stage process involving sub-image decomposition, alignment matrix calculation, and coordinate transformation. This dimensional change in the processing approach enables accurate alignment on low-bit-width platforms.
2Measurement precision
If a processor with larger floating-point mantissa is used to improve alignment accuracy, then the alignment accuracy is improved, but the device cost increases
Solution Approach 1:
By segmenting the image processing into sub-images, the patent enables the use of low-bit-width floating-point processors to achieve accuracy comparable to high-bit-width processors, thereby reducing device cost while maintaining alignment precision.
Solution Approach 2:
The patent changes the processing parameters by decomposing images into sub-images and using alignment matrices, which allows low-bit-width processors to achieve the same alignment accuracy as high-bit-width processors would provide directly.
3Ease of manufacture
If the existing depth alignment algorithm is implemented on embedded platform with low-bit-width floating-point arithmetic unit, then the device cost is reduced, but the processing time increases
Solution Approach 1:
The patent segments the alignment process into parallel sub-image processing tasks with pre-calculated alignment matrices, which reduces the computational burden on each processing step and enables faster execution on embedded platforms compared to sequential full-image processing.
Solution Approach 2:
The patent performs preliminary decomposition of images into sub-images and pre-calculates alignment matrices before the actual alignment operation. This preliminary action reduces the computational complexity during real-time processing, thereby reducing processing time.
4Measurement precision
If high-resolution images are processed directly without decomposition, then the alignment accuracy is maintained, but the computational power and time required increases
Solution Approach 1:
The patent divides high-resolution images into multiple sub-images, allowing parallel processing and reducing the computational load on each processing unit. This segmentation maintains alignment accuracy while significantly improving processing efficiency on embedded platforms.
Solution Approach 2:
The patent processes images in partial segments (sub-images) rather than attempting to process the entire high-resolution image at once. This partial action approach maintains the necessary alignment accuracy while making the computation feasible for embedded systems with limited resources.
Data Source
AI summary
An apparatus comprises an interface and a processor. The interface may be configured to receive pixel data. The processor may be configured to (i) process the pixel data arranged as video frames, (ii) decompose each of the video frames comprising a high-resolution two-dimensional (2D) image into a plurality of 2D sub-images using a decomposition offset, (iii) decompose each of the video frames comprising a high-resolution depth map image into a plurality of depth map sub-images using the decomposition offset, (iv) calculate a respective alignment matrix for each of the plurality of 2D sub-images and a corresponding one of the plurality of depth map sub-images using the decomposition offset, (v) perform matrix operations on the plurality of 2D sub-images and the plurality of depth map sub-images using the respective alignment matrices to obtain a plurality of aligned 2D sub-images and depth map sub-images, (v) determine projection coordinates and depth values of the plurality of aligned 2D sub-images and depth map sub-images based on the high-resolution 2D image, and (vi) generate an aligned high-resolution depth map using the projection coordinates and depth values.