Image Device Memory-to-Memory Processing Pipeline

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Solution Overview

Problem

The operation speed of image devices is not adequately improved despite advancements in central processing unit speed, leading to inefficiencies in processing image data.

Innovation Solution

An image device configuration that includes a memory, a first image processor for performing initial image processing on sub-data and writing results, and a second image processor for performing different secondary image processing, with a controller managing the reading and writing of processed data to enhance processing speed by allowing simultaneous and sequential operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sequential processing is used where the second image processor waits for the first sub-data to be fully written before starting, then data integrity is ensured, but processing time increases and operation speed decreases

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The second image processor performs preliminary actions by reading the first sub-data from memory before the first image processor finishes writing it. This allows the second processing stage to start in advance, overlapping operations and reducing total processing time while maintaining data integrity through controlled memory access timing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements continuous useful action by enabling the second image processor to operate continuously without idle waiting. The second processor reads data from memory as soon as it is available and performs processing operations without interruption, maximizing utilization and reducing overall processing time.

Inventive Principle:
Principle #20Continuity of useful action

2Speed

If the second image processor reads data from memory before it is fully written by the first processor, then processing speed improves, but data completeness may be compromised

Engineering Contradiction:
Improveoperation speedVSAvoiddata completeness
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The memory acts as an intermediary buffer between the first and second image processors. The controller manages the memory access timing, allowing the second processor to read data from the memory buffer before the first processor completes writing, while ensuring data completeness through coordinated access control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The second image processor performs preliminary reading actions from the memory before the first processor completes the write operation. This preliminary action enables pipelining of processing operations, improving throughput while the memory buffer ensures data completeness is maintained.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple image processors operate simultaneously on different sub-data, then productivity increases, but system complexity increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the image data into multiple sub-data portions that can be processed independently by different image processors. This segmentation enables parallel processing and increases productivity, while the segmented structure simplifies the control logic compared to managing a single complex processing pipeline.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system employs partial action by having the second image processor read and process only the necessary sub-data portions before they are fully written by the first processor. This partial overlapping operation increases throughput without requiring complete synchronization of all data transfers, reducing control complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10277807B2Image device and method for memory-to-memory image processing
Publication Date: 2019.04.30 SAMSUNG ELECTRONICS CO LTD
  • US10277807B2 patent drawing
  • US10277807B2 patent drawing
  • US10277807B2 patent drawing

AI summary

Provided are an image device and method for operating the device. The image device includes a memory, a first image processor configured to receive image data that includes first and second sub-data, perform first image processing, and write a result of the first image processing to the memory, a second image processor configured to read the first and second sub-data, on which the first image processing has been performed, from the memory, and perform second image processing that is different from the first image processing, and a controller configured to control the second image processor to read the first sub-data, on which the first image processing has been performed, from the memory, before the second sub-data, on which the first image processing has been performed, is written in the memory, after the first sub-data, on which the first image processing has been performed, is written in the memory.