Image Distortion Correction Circuit Failure Detection

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Solution Overview

Problem

Existing image distortion correction circuits for head-up displays in vehicles require large memory capacity and increased circuit scale and power consumption due to the need for dual mapping processing systems for failure detection, which can obstruct driver vision if failures occur.

Innovation Solution

An image distortion correction circuit that includes a first distortion correction circuit, an inspection region defining circuit, an inspection region extraction circuit, a second distortion correction circuit, and a failure determination circuit, which performs mapping only on a smaller inspection image region to detect failures, reducing circuit scale and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dual mapping processing circuits are used for failure detection, then reliability is improved, but circuit scale increases

Engineering Contradiction:
Improvefailure detection capabilityVSAvoidcircuit scale
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the image processing into two segments: a first distortion correction circuit that processes the entire image, and a second distortion correction circuit that processes only a specific region of interest. This segmentation allows failure detection functionality while reducing the scale of the second circuit, as it handles only a portion of the image rather than the complete image data.

Inventive Principle:
Principle #1Segmentation

2Reliability

If dual mapping processing circuits are used for failure detection, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvefailure detection capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the processing workload by assigning the second distortion correction circuit to process only a specific region of interest rather than the entire image. This reduces the computational burden and memory access requirements, thereby lowering power consumption while maintaining failure detection capability through comparison of the two circuits' outputs.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If large-capacity memory is allocated for distortion correction, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvedistortion correction accuracyVSAvoidmemory capacity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and processes only a specific region of interest from the full image in the second distortion correction circuit. This extraction approach reduces the amount of data that needs to be stored and processed by the second circuit, thereby reducing memory capacity requirements while still enabling effective failure detection through comparison of the processed regions.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11587211B2Image distortion correction circuit and display device
Publication Date: 2023.02.21 LAPIS SEMICON CO LTD
  • US11587211B2 patent drawing
  • US11587211B2 patent drawing
  • US11587211B2 patent drawing

AI summary

An image distortion correction circuit according to the present invention comprises; a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal; an inspection region defining circuit that defines an inspection image region in the one-frame image; an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal; a second distortion correction circuit that outputs a second inspection signal, the second inspection signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region; and a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually different.