Scalable Image Encoding with On-Chip Memory Reuse
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Solution Overview
Problem
Existing image encoding and decoding solutions incur high costs and power consumption due to frequent access to off-chip memory, particularly in scalable coding protocols, as the encoder and decoder need to read and write image data frequently across this memory, leading to inefficient bandwidth usage and increased power consumption.
Innovation Solution
The proposed method involves storing sub-images in on-chip memory after initial retrieval from off-chip memory and reusing this memory for subsequent encoding layers, reducing the need for frequent off-chip access and optimizing data storage and retrieval processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the encoder frequently accesses off-chip memory to read and write image data for each image layer, then the encoding process can be completed, but the power consumption and costs increase significantly
Solution Approach 1:
The patent divides the memory access process into two segments: initial data loading from off-chip memory to on-chip memory, and subsequent processing using on-chip memory. This segmentation reduces frequent off-chip accesses by keeping working data in on-chip memory, thereby reducing power consumption while maintaining encoding speed
Solution Approach 2:
The patent performs preliminary action by pre-loading image data from off-chip memory to on-chip memory before the actual encoding process. This advance data preparation eliminates the need for frequent off-chip memory accesses during encoding, reducing power consumption while ensuring data availability for high-speed processing
2Adaptability or versatility
If the encoder accesses off-chip memory frequently for each image layer, then all required data can be retrieved, but the bandwidth usage becomes inefficient
Solution Approach 1:
The patent extracts frequently accessed image data from off-chip memory and places it in on-chip memory. This extraction reduces the burden on off-chip memory bandwidth by keeping working data locally available, improving bandwidth efficiency while maintaining full data retrieval capability through the initial load
3Measurement precision
If the decoder performs reverse processing with frequent off-chip memory access, then decoding accuracy is maintained, but similar problems as the encoder occur
Solution Approach 1:
The patent applies segmentation to the decoder by dividing memory operations into initial data loading from off-chip memory and subsequent decoding operations using on-chip memory. This maintains decoding accuracy by ensuring data availability while reducing power consumption through minimized off-chip accesses
Solution Approach 2:
The decoder performs preliminary action by pre-loading decoded data into on-chip memory before enhancement layer processing. This advance preparation ensures accurate decoding while reducing power consumption by eliminating frequent off-chip memory accesses during the decoding process
Data Source
AI summary
This application provides an image encoding and decoding method and apparatus. The method may include: reading a first sub-image of a first frame of image from a first memory, and storing the first sub-image into a second memory, where the first memory is an off-chip memory, and the second memory is an on-chip memory; encoding a base layer of the first sub-image based on the first sub-image, to obtain a bitstream of the base layer of the first sub-image and a first reconstructed image; writing the first reconstructed image into the second memory; reading the first reconstructed image and the first sub-image from the second memory; and encoding a first enhancement layer of the first sub-image based on the first reconstructed image and the first sub-image, to obtain a bitstream of the first enhancement layer of the first sub-image and a second reconstructed image.