Image Encoding Architecture Using Reordering Multiplexer for Memory Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current image encoding/decoding systems face inefficiencies in memory utilization when handling multiple channels, such as RGB or YCbCr, due to separate memory areas and complex memory controllers, which hinder effective compression and increase resource usage.

Innovation Solution

An encoding/decoding architecture that uses variable length coding (VLC) encoders and decoders, a reordering multiplexer, memory dispatcher, and request demultiplexer to optimize memory usage by determining the order of data blocks based on encoding progress, allowing continuous storage and retrieval of multi-channel data without channel codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory space is divided into three separate memory areas for RGB channels, then each channel has dedicated storage space, but memory controller complexity increases and efficiency decreases due to three-read-three-write operation mode

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidmemory controller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the three separate memory areas for RGB channels into a single unified memory space. Data blocks from different channels are stored sequentially in this unified space according to encoding progress, eliminating the need for separate memory areas and simplifying the memory controller to a single-read-single-write operation mode.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified memory space serves multiple functions by storing data blocks from all three RGB channels in a single area. The memory controller operates universally with a single read-write mechanism that can handle any channel's data blocks, replacing the specialized three-read-three-write controllers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If memory space is divided into multiple memory units with fixed volume and channel labels, then data organization is simplified, but available memory space is reduced due to label occupation

Engineering Contradiction:
Improvedata organization easeVSAvoidavailable memory space
Core Design Contradiction:
Ease of operationVSVolume of stationary object

Solution Approach 1:

The patent extracts and removes the channel label information from the memory storage structure. Instead of embedding channel identifiers within each memory unit, the system uses the sequential storage order and a separate tracking mechanism to identify channel data, thereby eliminating the space consumed by labels and maximizing available memory capacity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary mechanism (the memory management unit that tracks encoding progress and data block positions) to manage data organization without requiring channel labels in the memory units themselves. This intermediary handles the complexity of multi-channel data management while keeping the actual storage space maximized.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of substance

If VLC encoding is used for lossless compression, then compression efficiency is improved, but decoding cannot proceed unless previous data is decoded, requiring separate encoding/decoding for each channel

Engineering Contradiction:
Improvecompression efficiencyVSAvoidencoding/decoding throughput
Core Design Contradiction:
Loss of substanceVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-encoding all three RGB channels using VLC encoding before the decoding phase begins. The encoded data blocks from all channels are stored in the unified memory space in advance, allowing the decoding process to retrieve and decode blocks from different channels in parallel without waiting for sequential processing of previous channels.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8036476B2Image encoding/decoding device and method thereof with data blocks in a determined order
Publication Date: 2011.10.11 REALTEK SEMICON CORP
  • US8036476B2 patent drawing
  • US8036476B2 patent drawing
  • US8036476B2 patent drawing

AI summary

The invention provides an image encoding/decoding device and method. An encoding/decoding architecture of the invention includes: encoders for encoding image data into data blocks; a reordering multiplexer for receiving the data blocks and determining an order by which the data blocks are written into a memory according to an order of an achieved percentage of an encoding progress for each encoder; a memory writing unit, a memory dispatcher, a memory controller, and a memory reading unit, for writing the data blocks into the memory and reading the data blocks from the memory; a request demultiplexer for receiving the read data blocks from the memory reading unit and outputting the received data blocks according to data request signals; and decoders for generating the data request signals, receiving the output data blocks from the request demultiplexer, decoding the received data blocks, and then outputting the decoded data blocks.