Image Processing Memory Allocation via Segmented Backup

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Solution Overview

Problem

Existing image processing systems, such as TVs and Blu-ray players, face inefficiencies due to the need for Hardware Dedicated Memory Allocator (HDMA) to utilize dedicated hardware memory, which requires the hardware to be non-operational during memory allocation, leading to prolonged turning-off times as data is backed up to system memory.

Innovation Solution

An image processing apparatus with a main memory, two ancillary memories, and a controller that manages the storage and execution of applications based on setting information, allowing for efficient loading and storing of applications between the memories depending on the signal processor's operational status, thereby reducing the need for HDMA to be operational and minimizing memory backup time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If HDMA is used to allocate dedicated memory to hardware, then the hardware memory can be utilized by the OS when hardware is not operating, but the turning-off time of HDMA is prolonged due to data backup requirements

Engineering Contradiction:
Improvememory allocation flexibilityVSAvoidturning-off time of HDMA
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent divides the memory system into multiple independent memory banks (first memory bank, second memory bank, third memory bank) that can operate independently. This segmentation allows data to be distributed across multiple banks during backup operations, enabling parallel write operations that reduce the total backup time when HDMA turns off, while maintaining the flexible memory allocation capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a buffer memory that pre-stores data before it needs to be backed up to the dedicated memory. By preparing data in advance in the buffer memory, the system reduces the actual backup time when HDMA transitions from on to off state, as the data is already organized and ready for rapid transfer without waiting for sequential write operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is backed up in system memory when HDMA turns off, then memory allocation is maintained, but the backup time is proportional to system memory capacity causing delays

Engineering Contradiction:
Improvememory data integrityVSAvoiddata backup time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the backup operation by distributing data across multiple independent memory banks. Each bank can receive data simultaneously through parallel write operations, reducing the total backup time from being proportional to total memory capacity to being proportional to the number of banks, thereby maintaining data integrity while minimizing time loss.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a buffer memory as an intermediary between the system memory and the dedicated memory banks. This buffer acts as a staging area that temporarily holds data during the transition, allowing for more efficient data transfer and reducing the time required to back up data when HDMA turns off, while ensuring no data is lost.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dedicated memory is used exclusively by hardware, then hardware performance is optimized, but the OS cannot use or access the memory improving system resource utilization

Engineering Contradiction:
Improvehardware performanceVSAvoidOS memory access capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic memory allocation system where the HDMA can switch between on and off states based on hardware operational requirements. When hardware is not operating, the HDMA turns off and allows the OS to access the dedicated memory through the buffer memory interface. This dynamic switching mechanism ensures hardware performance is optimized during operation while enabling OS access during idle periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent creates a universal memory system where the same dedicated memory can serve both hardware and OS needs at different times. The buffer memory and multiple memory banks provide a unified interface that allows the memory to function as dedicated hardware memory when needed and as accessible system memory when the hardware is idle, improving overall system resource utilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10074153B2Apparatus for processing image, comprising main memory to store application and setting information
Publication Date: 2018.09.11 SAMSUNG ELECTRONICS CO LTD
  • US10074153B2 patent drawing
  • US10074153B2 patent drawing
  • US10074153B2 patent drawing

AI summary

An image processing apparatus may include a main memory configured to store an application for reproducing image content, and setting information corresponding to the stored application, a first ancillary memory configured to load and store the stored application from the main memory in response to operation of a signal processor, a second ancillary memory configured to, in response to the signal processor operating, temporarily store the signal-processed image content, and in response to the signal processor not operating, load and store the stored application from the main memory, and a controller configured to, in response to receiving an execution request with respect to the application for reproducing the image content, and the signal processor not operating, load and store the stored application from the main memory into the second ancillary memory based on the setting information corresponding to the application stored in the main memory, and execute the stored application.