Image Pickup Chip Transparent Adhesive Sealing

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Solution Overview

Problem

Existing image pickup apparatuses produced by conventional WL-CSP methods face challenges in achieving high reliability and efficient production, particularly due to issues with adhesive layer curing, sealing member filling, and through-hole interconnection formation, which can lead to defects and reduced yield rates.

Innovation Solution

The method involves bonding an image pickup chip with a transparent support substrate using a transparent adhesive layer and covering it with an insulating sealing member, followed by precise machining and interconnection formation, allowing for efficient production and high reliability of ultra-small image pickup apparatuses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the image pickup chip and transparent support substrate are bonded using a transparent adhesive layer in the WL-CSP method, then the apparatus achieves ultra-small size and high integration, but the adhesive layer may not cure properly or may have insufficient bonding strength, leading to reduced reliability

Engineering Contradiction:
Improvesize of image pickup apparatusVSAvoidbonding reliability of adhesive layer
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by forming through-hole interconnections in the image pickup chip substrate before bonding to the transparent support substrate. This sequence ensures that the chip substrate is properly prepared and positioned, allowing the adhesive layer to bond surfaces that are already in optimal alignment, thereby improving curing reliability while maintaining ultra-small dimensions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The transparent adhesive layer serves as an intermediary between the image pickup chip substrate and the transparent support substrate. The patent specifies that this adhesive layer has controlled thickness and optical transparency, enabling it to mediate the bonding while allowing light to pass through for proper curing and maintaining the ultra-small form factor without compromising bonding reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If through-hole interconnections are formed in the joined wafer state during WL-CSP fabrication, then production efficiency is improved, but machining precision and alignment accuracy may be compromised, leading to defects

Engineering Contradiction:
Improveproduction efficiency of image pickup apparatusVSAvoidalignment precision of through-hole interconnections
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by dividing the fabrication process into distinct stages: first forming through-hole interconnections in the image pickup chip substrate individually, then bonding to the transparent support substrate, and finally performing wafer-level machining for collective individualization. This segmented approach allows precise through-hole formation before bonding, maintaining alignment accuracy while enabling efficient batch processing in subsequent steps.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If the image pickup chip is individually processed after wafer-level bonding, then manufacturing precision is maintained, but production time and complexity increase, reducing productivity

Engineering Contradiction:
Improveprecision of individual chip processingVSAvoidproduction speed of image pickup apparatus
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges individual chip processing steps with wafer-level batch processing. Through-hole interconnections are formed individually in the chip substrate before bonding, but subsequent steps including transparent support substrate bonding, sealing member application, and final individualization are performed at the wafer level. This combination maintains manufacturing precision for critical through-hole formation while achieving high productivity through batch processing of less critical steps.

Inventive Principle:
Principle #5Merging (Combining)

4Object-affected harmful factors

If a sealing member is applied to cover side faces of the image pickup chip and adhesive layer, then humidity resistance and electrical insulation are improved, but the device complexity and manufacturing steps increase

Engineering Contradiction:
Improvehumidity and electrical interference resistanceVSAvoidcomplexity of sealing structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The sealing member applied to the joined wafer serves multiple functions simultaneously: it provides humidity resistance by sealing the interfaces between the image pickup chip substrate and transparent support substrate, provides electrical insulation by covering conductive elements, and maintains structural integrity of the ultra-small apparatus. This multi-functional sealing approach protects against harmful factors without requiring separate components for each function, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in high-reliability, ultra-small image pickup apparatuses with improved electrical insulation and humidity resistance, suitable for applications like endoscope distal ends, by utilizing existing equipment and minimizing defects through precise alignment and sealing.

Implementation Method 1

a transparent adhesive layer that bonds the first main face of the image pickup chip and the support substrate section

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS10249672B2Image pickup apparatus, semiconductor apparatus, and image pickup unit
Publication Date: 2019.04.02 OLYMPUS CORPORATION(JP)
  • US10249672B2 patent drawing
  • US10249672B2 patent drawing
  • US10249672B2 patent drawing

AI summary

An image pickup apparatus includes: an image pickup chip including a light receiving section and electrode pads, on a first main face, and a plurality of connection electrodes, each of which is connected to each of the electrode pads via each of a plurality of through-hole interconnections, on a second main face; a transparent cover glass having a larger plan-view dimension than the image pickup chip; a transparent adhesive layer that bonds the first main face of the image pickup chip and the cover glass; and a sealing member that covers a side face of the image pickup chip and a side face of the adhesive layer, and is made of an insulating material having a same plan-view dimension as the cover glass.