Solid-State Image Pickup Element Wiring Reduction
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Solution Overview
Problem
Conventional differential-amplification-type solid-state image pickup elements require multiple wiring lines, increasing manufacturing costs due to the need for additional metallic layers when wiring cannot be accommodated within pixel pitch, and are undesirable when pixels are not switched as it prevents signal readout from the reference pixel.
Innovation Solution
A solid-state image pickup element with an electric-charge accumulation unit, a reference reset transistor for supplying reset voltage, and a readout reset transistor for supplying a different voltage during signal readout, allowing for reduced wiring lines by using two reference or readout transistors in series or parallel configurations, enabling signal readout from both pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a vertical reset input line is arranged to both pixels in a pair for switching reference and signal pixels, then signal readout from both pixels is enabled, but the number of wiring lines increases
Solution Approach 1:
The vertical reset input line is configured to serve dual purposes: it provides reset voltage to the reference pixel during reference signal generation and provides a different voltage level to the signal pixel during signal readout. This multi-functional use of a single wiring line resolves the contradiction by enabling both pixels to be properly initialized and readout without increasing the number of wiring lines.
Solution Approach 2:
The system dynamically changes the voltage level supplied through the shared vertical reset input line based on operational mode. During reference signal generation, the line supplies reference reset voltage; during signal readout, it supplies a different voltage level. This dynamic voltage switching allows a single static wiring line to fulfill multiple functional requirements.
2Adaptability or versatility
If additional metallic layers are added to accommodate wiring outside pixel pitch, then wiring layout flexibility is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges the reset voltage supply function and the signal readout function into a single vertical reset input line, eliminating the need for separate wiring lines for each function. This consolidation reduces the total number of wiring lines required, allowing all wiring to be accommodated within the existing pixel pitch without adding metallic layers, thereby reducing manufacturing cost.
Solution Approach 2:
The patent utilizes the vertical dimension by arranging pixels in pairs along the vertical direction and using a vertical reset input line that extends through multiple pixel rows. This vertical arrangement allows efficient use of wiring space within the pixel pitch, avoiding the need for additional horizontal wiring layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the number of wiring lines, lowers manufacturing costs, and allows for effective signal readout from both reference and signal pixels, enhancing sensitivity while maintaining operational efficiency.
Implementation Method 1
a photoelectric conversion unit, and generate signal voltage corresponding to an amount of the electric charge
Data Source
AI summary
Provided is a solid-state image pickup element that amplifies the difference between respective signals of a pair of pixels and enables a reduction in the number of wiring lines.The solid-state image pickup element includes an electric-charge accumulation unit, a reference reset transistor, and a readout reset transistor. The electric-charge accumulation unit accumulates electric charge transferred from a photoelectric conversion unit and generates signal voltage corresponding to the amount of the electric charge. The reference reset transistor supplies predetermined reset voltage to the electric-charge accumulation unit in a case of generating predetermined reference voltage. The readout reset transistor supplies voltage different from the reset voltage to the electric-charge accumulation unit in a case of reading out the signal voltage.


