Image Processing Platform Runtime Efficiency via Buffer Modification
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Solution Overview
Problem
Traditional image processing technologies face challenges in achieving both high versatility in software development and power efficiency, with general-purpose processors consuming excessive energy and custom-designed circuits being limited in functionality.
Innovation Solution
The development of an image processing technology platform that utilizes a hardware architecture comprising line buffer units, stencil processor units, and sheet generator units interconnected via a network, allowing for the simultaneous processing of overlapping stencils through a two-dimensional shift register array and execution lane array, which improves power efficiency by processing large blocks of data efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If general purpose processors are used for image processing, then versatility in application software development is improved, but power consumption per unit of data increases
Solution Approach 1:
The image processing task is segmented into multiple kernels that can be executed in parallel on the reconfigurable processor. Each kernel handles a specific processing function (e.g., filtering, transformation), allowing the system to achieve both versatility through kernel selection and efficiency through specialized parallel execution of each segment.
Solution Approach 2:
The processor architecture is dynamically reconfigurable, allowing the hardware structure to be adapted at runtime based on the specific image processing task. This dynamic reconfiguration enables the system to optimize its data processing blocks and memory structures for each kernel, achieving high efficiency while maintaining versatility across different applications.
2Use of energy by moving object
If custom designed fixed function circuitry is used, then power consumption per unit of data is reduced, but the set of performable tasks is limited
Solution Approach 1:
The reconfigurable processor is designed as a universal platform that can be configured to perform multiple different image processing tasks through loading different kernels. The architecture provides fixed-function efficiency for each specific task while maintaining universal adaptability across various image processing applications through its reconfigurable nature.
Solution Approach 2:
The processor allows changing of architectural parameters such as data processing block size, memory structure, and execution pipeline configuration based on the specific kernel being executed. This parameter adaptation enables the system to optimize power efficiency for each task while maintaining the ability to perform diverse functions.
3Use of energy by moving object
If larger blocks of data are processed, then power efficiency is improved, but memory resource requirements increase
Solution Approach 1:
Data is pre-loaded into on-chip memory blocks before processing begins, and the processor is configured to process large blocks of data in batches. This preliminary data preparation reduces the frequency of memory access operations, improving power efficiency while the memory architecture is designed to accommodate the required block sizes through efficient memory allocation.
Solution Approach 2:
The processor utilizes a two-dimensional memory architecture with separate row and column memory structures, allowing efficient storage and access of large data blocks. This dimensional organization of memory resources enables the system to handle large processing blocks without linearly increasing power consumption, as data can be accessed in optimized patterns across the two-dimensional memory space.
Data Source
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AI summary
A method is described. The method includes constructing an image processing software data flow in which a buffer stores and forwards image data being transferred from a producing kernel to one or more consuming kernels. The method also includes recognizing that the buffer has insufficient resources to store and forward the image data. The method also includes modifying the image processing software data flow to include multiple buffers that store and forward the image data during the transfer of the image data from the producing kernel to the one or more consuming kernels.