Image Processing Chip Multiplexer Bypass Power Management
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Solution Overview
Problem
Conventional image processing systems with serial packet transmission interfaces incur unnecessary power consumption and increased manufacturing costs due to the requirement of maintaining a transmission interface controller active even when a bypass is needed, as the image processing chip must still packetize and depacketize data without performing image processing.
Innovation Solution
An image processing chip with a multiplexer that enables a signal bypass across the entire image processing block, allowing for two operating modes: one where the image processing block is powered down to reduce power consumption and costs, and another where it processes data, using a single multiplexer to manage data transmission between the image sensor and application processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a bypass is added between input end and output end of image processing engine to transmit original image data without modification, then data transmission capability is improved, but transmission interface controller still consumes power and remains turned on causing increased power consumption
Solution Approach 1:
The patent segments the data transmission path into two independent channels: one channel goes through the image processing engine (IPE) for processed data, and another channel bypasses the IPE entirely for original data transmission. The multiplexer selectively switches between these channels, allowing the transmission interface controller to remain active for bypass operations without requiring the power-intensive IPE to be turned on, thus resolving the power consumption issue while maintaining data transmission capability.
2Reliability
If transmission interface controller is kept turned on to packetize and depacketize data for bypass transmission, then data transmission reliability is improved, but manufacturing cost increases
Solution Approach 1:
The transmission interface controller is designed to perform multiple functions: it can packetize and depacketize data when the IPE is processing images, and it can also handle bypass transmission directly without IPE involvement. This multi-functionality allows the system to maintain reliable data transmission through a single controller design while reducing manufacturing costs by eliminating the need for separate bypass transmission hardware.
3Use of energy by moving object
If image processing block is powered down during bypass operations, then power consumption is reduced, but data transmission capability must be maintained
Solution Approach 1:
The system dynamically switches between two operational modes controlled by a multiplexer: in the first mode, the IPE is powered down and bypass transmission is activated for power saving; in the second mode, the IPE is activated for image processing while transmission interface controller handles data packetization. This dynamic switching mechanism ensures that data transmission capability is maintained in both modes while optimizing power consumption by powering down the IPE during bypass operations.
Data Source
AI summary
An image processing chip and an image processing system are provided. The image processing chip includes a first image end, a second image end, an image processing block and a multiplexer. The first image end receives at least one first image data packet. The image processing block is used to convert the at least one first image data packet into at least one second image data packet. The multiplexer has a first input end coupled to the first image end, a second input end coupled to the image processing block, and an output end coupled to the second image end. When the image processing chip operates in a first mode, the multiplexer is coupled to the first input end and the output end to transmit the at least one first image data packet from the first image end to the second image through the multiplexer.