Image Processing Edge Extraction Parallel Region Allocation

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Solution Overview

Problem

Conventional image processing systems face decreased rendering speed when handling pages with a large number of graphical objects, despite the use of multi-core CPUs, due to inefficient CPU core allocation and memory access patterns.

Innovation Solution

An image processing apparatus that allocates CPU cores efficiently by dividing a page into regions and assigning a predetermined number of threads to each region for edge extraction and synthesis, allowing for parallel processing and improved core utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a separate processing unit (thread) is allocated to each band or each graphic to improve parallelism, then the processing speed increases, but the execution speed varies depending on memory access patterns, leading to inefficient core utilization

Engineering Contradiction:
Improveprocessing speedVSAvoidexecution speed consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The page is divided into multiple regions, and each region is further divided into bands. This hierarchical segmentation allows for more granular control of parallel processing, enabling better load distribution across multiple CPU cores while maintaining consistent execution speeds by balancing the workload within each region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the page are processed with different numbers of threads based on their specific characteristics and processing loads. This localized optimization ensures that each region receives appropriate processing resources, improving overall execution consistency while maintaining high processing speed.

Inventive Principle:
Principle #3Local quality

2Speed

If the number of processor cores is increased to handle pages with large numbers of graphical objects, then the rendering speed improves, but the memory access patterns cause varying execution speeds, reducing the expected performance gain

Engineering Contradiction:
Improverendering speedVSAvoidcore utilization efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The system dynamically adjusts the number of threads allocated to each region based on the processing load and memory access patterns. This dynamic allocation ensures that CPU cores are efficiently utilized without being bottlenecked by memory access variations, maintaining high rendering speed while improving core utilization efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The region division acts as an intermediary layer between the graphical objects and the processor cores. By introducing this intermediate organizational structure, the system can better manage memory access patterns and distribute workloads more evenly across cores, resolving the contradiction between speed and utilization efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If one page of data is divided into bands with separate processing units allocated to each band, then the processing speed improves, but the rendering efficiency decreases when pages with large numbers of graphical objects are input

Engineering Contradiction:
Improveprocessing speedVSAvoidrendering efficiency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a nested structure where pages are divided into regions, and each region contains multiple bands. This nested organization allows for hierarchical parallel processing, where both region-level and band-level parallelism can be exploited simultaneously, improving rendering efficiency while maintaining high processing speed for pages with large numbers of graphical objects.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9542127B2Image processing method and image processing apparatus
Publication Date: 2017.01.10 CANON KK
  • US9542127B2 patent drawing
  • US9542127B2 patent drawing
  • US9542127B2 patent drawing

AI summary

A page containing a large number of graphics and therefore having a high process load can be processed in parallel and quickly by dividing an edge extraction process into a plurality of threads. In this case, if the number of cores is eight, the edge extraction process is performed by allocating four cores to one of regions obtained by dividing a page and the remaining four cores to the other region.