Image Processing Circuit Memory Reduction via Flag Signal Extraction
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Solution Overview
Problem
Display devices employing the PenTile technique face challenges in reducing memory size for rendering modules, which are necessary for compensating resolution deterioration due to reduced sub-pixels, leading to increased complexity and memory requirements.
Innovation Solution
An image processing circuit is designed with a mapper and renderer that utilize a memory system including a line buffer and flag buffer to store intermediate data and flag signals, allowing the rendering circuit to calculate and store next flag signals, thereby reducing memory needs by using previous flag signals instead of previous data signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a rendering module stores previous intermediate data signals and flag signals in memory for rendering operations, then rendering accuracy and image quality are improved, but memory size requirements increase
Solution Approach 1:
The patent extracts only the necessary flag signal information from the previous intermediate data signals and stores only these flag signals in the memory, rather than storing the complete previous intermediate data signals. This extraction approach maintains the essential information needed for accurate rendering while significantly reducing memory requirements.
Solution Approach 2:
The patent creates a simplified copy of the previous data by storing only the flag signals rather than the complete intermediate data signals. The flag signals serve as a condensed representation that contains the necessary information for rendering operations, reducing memory usage while maintaining functionality.
2Illumination intensity
If the rendering module uses a two-pixels-with-four-sub-pixels PenTile design, then display brightness is increased, but resolution deteriorates requiring additional rendering complexity
Solution Approach 1:
The patent changes the rendering parameters by using flag signals to indicate whether adjacent pixels should be rendered together. This parameter change allows the rendering module to adaptively handle the PenTile structure's unique sub-pixel arrangements, maintaining brightness advantages while managing rendering complexity through simplified control logic.
3Reliability
If the rendering module stores complete previous intermediate data signals in memory, then rendering accuracy is maintained, but memory usage and device complexity increase
Solution Approach 1:
The patent extracts only the flag signal component from the previous intermediate data signals for storage in memory. This extraction maintains the essential information needed for accurate rendering decisions while eliminating the need to store and manage complete intermediate data signals, thereby reducing memory management complexity.
Data Source
AI summary
An image processing circuit includes a mapper configured to convert an image signal into an intermediate data signal, and a renderer configured to convert the intermediate data signal into a data signal, wherein the renderer includes a memory configured to store the intermediate data signal and a flag signal, and a rendering circuit configured to output a data signal corresponding to a current line in response to a next intermediate data signal corresponding to a next line, to output a current intermediate data signal corresponding to the current line from the memory, and to output a previous flag signal corresponding to a previous line from the memory.