Image Processing IC With Symmetrical Scaling for Lower Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing resolution of image frames in display devices leads to higher processing costs and power consumption for image processing integrated circuits, necessitating more economical image processing solutions.
Innovation Solution
An image processing integrated circuit that includes a down-scaler circuit to convert high-resolution frames to lower-resolution frames, followed by picture quality processing, and then an up-scaler circuit to restore the higher resolution, with symmetrical down- and up-scaling operations to maintain image detail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If image processing is performed directly on high-resolution frames, then image quality can be maintained, but processing cost and power consumption increase significantly
Solution Approach 1:
The image processing pipeline is segmented into three distinct stages: down-scaling circuit (reducing resolution), picture quality processing circuit (performing processing on reduced data), and up-scaler circuit (restoring resolution). This segmentation allows picture quality processing to operate on lower-resolution intermediate frames, reducing computational load and power consumption while maintaining final image quality through the up-scaling restoration
Solution Approach 2:
A low-resolution intermediate frame is introduced as a mediator between the original high-resolution frame and the final processed high-resolution frame. The picture quality processing circuit processes this intermediate low-resolution frame, which requires significantly less computational resources, and then the up-scaler circuit reconstructs the high-resolution output, achieving energy efficiency without sacrificing final image quality
2Use of energy by moving object
If down-scaling is used to reduce processing load, then power consumption decreases, but image details may be lost
Solution Approach 1:
The down-scaling operation is performed as a preliminary action before picture quality processing, creating a reduced-resolution intermediate frame that requires less processing power. The symmetrical up-scaling operation is designed in advance to reverse the down-scaling effects, ensuring that image details are restored after processing, thus preventing permanent information loss
Solution Approach 2:
The resolution parameter of the image frame is dynamically changed during processing: reduced during down-scaling to minimize processing requirements, and then restored during up-scaling to maintain final image quality. This parameter transformation allows the system to adapt computational resources to actual processing needs while preserving image details through the reversible nature of symmetrical scaling operations
Data Source
AI summary
The image processing IC includes a down-scaler circuit, a picture quality processing circuit, and an up-scaler circuit. The down-scaler circuit converts a first image frame with a first resolution into a second image frame with a second resolution smaller than the first resolution by using a down-scaling operation. The picture quality processing circuit performs at least one picture quality processing on the second image frame to generate a third image frame. The up-scaler circuit converts the third image frame with a third resolution into a fourth image frame with a fourth resolution greater than the third resolution by using an up-scaling operation. The up-scaling operation performed by the up-scaler circuit is symmetrical to the down-scaling operation performed by the down-scaler circuit.