Image Processing Memory Segmentation for Speed and Cost
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Solution Overview
Problem
Current image processing systems face challenges in efficiently correcting obliqueness in scanned images due to the high processing time required for random access in dynamic random access memories (DRAMs) and the increased cost associated with using static random access memories (SRAMs) for high-speed random access.
Innovation Solution
The implementation of an image processing apparatus that utilizes a combination of two different types of memories: a first memory for intra-block rearrangement processing using SRAM for high-speed random access and a second memory for inter-block rearrangement processing using DRAM, where the SRAM has a smaller capacity but faster access times, and the DRAM has a larger capacity but slower access times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If DRAM is used for image memory to reduce cost, then manufacturing cost is reduced, but processing speed decreases due to long setup and pre-charge time for random access
Solution Approach 1:
The patent divides the image memory into multiple banks (first bank, second bank, third bank, fourth bank) that can operate independently and simultaneously. This segmentation allows the system to perform multiple random access operations in parallel, thereby improving processing speed while using cost-effective DRAM technology.
Solution Approach 2:
The patent implements dynamic bank switching and selection mechanisms where the system can dynamically choose which memory bank to access based on the specific processing requirements. This dynamic approach optimizes access patterns and reduces setup and pre-charge times by anticipating and preparing the appropriate memory bank in advance.
2Speed
If SRAM is used for image memory to improve random access speed, then processing speed increases, but manufacturing cost increases significantly
Solution Approach 1:
The patent segments the high-speed memory requirements into specific bank operations rather than requiring all memory to be SRAM. By using multiple smaller DRAM banks that can be accessed in parallel, the system achieves comparable overall throughput to a single large SRAM memory at lower cost.
Solution Approach 2:
The patent changes the operational parameters of the memory system by implementing pipelined access patterns, overlapping read and write operations, and dynamic bank selection. These parameter changes allow DRAM to achieve effective high-speed performance through optimized access patterns rather than relying solely on inherent memory cell speed.
3Quantity of substance
If a single large-capacity memory is used to store entire image data, then memory capacity is sufficient, but random access time increases due to more setup and pre-charge cycles
Solution Approach 1:
The patent divides the large-capacity memory into multiple smaller banks, each capable of independent operation. This segmentation reduces the setup and pre-charge time for each individual bank while maintaining sufficient total capacity through the combination of all banks operating in parallel.
Solution Approach 2:
The patent implements continuous useful action by allowing multiple memory banks to operate simultaneously and independently. While one bank is undergoing setup or pre-charge, other banks can be accessed, ensuring that the system continuously performs useful work rather than idle during memory preparation cycles.
Data Source
AI summary
An image processing apparatus includes a first memory used for first rearrangement processing on a group of pixels in an input image, and a second memory used for second rearrangement processing on a group of pixels in an image obtained by the first rearrangement processing, and performs correction processing that includes the first rearrangement processing and the second rearrangement processing on the input image. One of the first and second memories is capable of higher-speed random access than the other memory and has a smaller memory capacity than the other memory. One of the first rearrangement processing and the second rearrangement processing is processing for rearranging a group of pixels in each of a plurality of block images generated from the input image, and the other rearrangement processing is processing for rearranging pixel rows among the block images. The one rearrangement processing involves random access to the one memory.