Image Processing Apparatus for High Frame Rate Display via Segmented Output
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Solution Overview
Problem
Current methods for improving image quality, especially for motion images, require increasing the operating speed of driving circuits and response speed of light modulation elements, which is costly and difficult to achieve, and do not effectively increase frame rates when using multiple displays for high-resolution images.
Innovation Solution
An image processing apparatus that stores an image signal at a first frame rate and outputs it to multiple display units at a second frame rate, which is 1/n of the first frame rate, allowing the images to be displayed in a dot-sequential or line-sequential manner with shifted start timings, thereby enhancing image quality without increasing the operating speed of the driving circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the frame rate is increased to improve motion image quality, then the image quality is improved, but the operating speed of the driving circuit and response speed of light modulation elements must be increased, which is costly and difficult to achieve
Solution Approach 1:
The patent divides the image display task across multiple display devices (at least n displays). Each display device operates at a lower frame rate (1/n of the original frame rate), but collectively they achieve the desired high frame rate effect. This segmentation allows the driving circuits and light modulation elements to operate at manageable speeds while still delivering improved motion image quality through the combined output of multiple displays.
2Measurement precision
If two displays are used to achieve twice the resolution, then the image resolution is improved, but the data transmission rate must be increased, which requires compressed data conversion techniques
Solution Approach 1:
The patent segments the image signal into separate signals for each display device. The image signal is divided such that each of the n display devices receives a portion of the data, allowing the system to achieve high resolution without requiring all displays to process and transmit the complete high-resolution signal simultaneously. This reduces the data transmission burden on each individual display's driving circuit.
Solution Approach 2:
The patent employs periodic action by alternating the display of images across different display devices in a sequential manner. The control unit switches between displaying images on different displays at specific time intervals, creating a periodic display pattern that allows each display to operate at lower frame rates while collectively achieving high frame rate performance.
3Productivity
If the operating speed of the driving circuit is increased to display motion images at higher frame rates, then the image quality is improved, but the cost increases
Solution Approach 1:
The patent segments the display system into multiple display devices, each operated by its own driving circuit. This allows the system to achieve high frame rates without requiring each individual driving circuit to operate at high speeds. The cost is distributed across multiple lower-cost display units rather than requiring one or two expensive high-speed display units, making the overall system more cost-effective.
Data Source
AI summary
In an image display system, when a sequence of frames α, α+1, α+2, α+3, . . . , with a frame rate of m is given as an input video signal S1, a controller controls a frame memory to output a sequence of frames α, α+2, . . . , as an output video signal S2 at a frame rate of m/2 and a sequence of frames α+1, α+3, . . . , as an output video signal S3 at a frame rate of m/2 such that the timing of outputting each of frames α+1, α+3, . . . , of the output video signal S3 is delayed by 1/m with respect of the timing of outputting each of frames α, α+2, . . . , of the output video signal S2. By displaying the output video signals S3 and S2 in the above-described manner, a resultant motion image formed by a combination of the output video signals S3 and S2 is refreshed at an effective frame rate of m.