Image Processing Apparatus Time-Division Multiplexing Camera Data
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Solution Overview
Problem
In systems with multiple cameras, the number of image processing circuits and circuit size increase significantly, leading to inefficiencies in processing line pixel data, as existing solutions require multiple circuits to handle data from each camera separately, resulting in increased complexity and resource usage.
Innovation Solution
An image processing apparatus with a FIFO memory, line buffers, and a control circuit that manages data output and storage, allowing for time-division processing of line pixel data from multiple cameras using a single image processing circuit, preventing overwriting of line buffers before image processing is finished and optimizing resource allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple image processing circuits are used to process data from each camera separately, then each camera's data can be processed independently and simultaneously, but the number of image processing circuits and circuit size increase significantly
Solution Approach 1:
The patent segments the image processing workflow into distinct phases: data input from multiple cameras, temporary storage in line buffers, sequential processing by a single image processing circuit, and output to frame memory. This segmentation allows a single processing circuit to handle multiple cameras by processing their data sequentially rather than requiring simultaneous parallel processing circuits for each camera.
Solution Approach 2:
The patent introduces line buffers as intermediary storage elements between the cameras and the single image processing circuit. These line buffers temporarily hold line pixel data from multiple cameras, allowing the processing circuit to retrieve and process data from different cameras in sequence without requiring multiple simultaneous processing circuits. The frame memory also serves as an intermediary for storing processed data before final output.
2Device complexity
If a single image processing circuit processes line pixel data from multiple cameras in time-division manner, then the number of image processing circuits is reduced, but data from previous cameras may be overwritten before processing is finished
Solution Approach 1:
The patent implements a control circuit that monitors the processing status and proactively manages data storage. When the image processing circuit is still processing data from one camera, the control circuit prevents new data from other cameras from overwriting the buffer by coordinating the timing of data input and processing. This preliminary action ensures data integrity before the overwriting issue can occur.
Solution Approach 2:
The control circuit establishes a feedback mechanism that continuously monitors the processing state of the image processing circuit and adjusts data input timing accordingly. The control circuit receives status information about ongoing processing operations and uses this feedback to control when data from subsequent cameras is written to the line buffers, ensuring that previous data is not overwritten until processing is complete.
Data Source
AI summary
An image processing apparatus in an embodiment includes a FIFO memory, a plurality of line buffers, an image processing circuit, and a control circuit. The plurality of line buffers store data inputted from a plurality of cameras. The image processing circuit performs predetermined image processing on the data stored in the plurality of line buffers. The control circuit performs control, according to an output control signal, such that output of data to the plurality of line buffers is stopped and the data stopped from being outputted is stored in the FIFO memory.