Image Processing Unit Parallel Block Segmentation
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Solution Overview
Problem
Current display devices face challenges in processing high-resolution images, such as 8K ultra high definition, without increasing the internal clock frequency and memory capacity, which leads to increased hardware manufacturing costs and time.
Innovation Solution
The method involves dividing input image data into blocks and processing them in parallel using a predetermined reference clock, reducing the input video clock below the reference clock through data partitioning and parallel processing, while maintaining the reference clock and memory capacity, and applying horizontal and vertical digital filters to generate processed image data with a lower resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the internal clock frequency and memory capacity are increased to process high-resolution images, then the image processing capability is improved, but the hardware manufacturing cost and time increase
Solution Approach 1:
The patent divides input image data into multiple blocks and processes them in parallel using a single reference clock frequency. This segmentation allows high-resolution image processing without requiring increased clock frequency or memory capacity, thereby avoiding increased manufacturing costs and time while maintaining processing capability.
2Adaptability or versatility
If the hardware system is reconfigured to process higher resolution images, then the resolution processing capability is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent dynamically processes image blocks in parallel at a fixed reference clock frequency, allowing the system to adapt to different resolution requirements through software control rather than hardware reconfiguration. This maintains resolution processing capability while avoiding manufacturing complexity and cost increases.
3Ease of manufacture
If data is processed sequentially instead of in parallel, then the hardware requirements are reduced, but the processing time increases
Solution Approach 1:
The patent segments image data into blocks that are processed in parallel using a single reference clock, reducing hardware requirements while maintaining efficient processing speed. This approach avoids the time loss of sequential processing while not requiring increased hardware capacity.
Data Source
AI summary
A display device according to an embodiment of the present invention may process an input image with higher resolution than allowed easily without reconfiguring a hardware system through an image processing unit which divides input image data with first resolution into image blocks of an acceptable size and generating processed image data with second resolution lower than the first resolution.