Image Processing Modules with Universal Data Structure
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Solution Overview
Problem
Existing image processing devices face complexity in combining arbitrary image processing modules due to the need for uniform output units and increased structural complexity, which hinders flexibility in processing different image data with varying color spaces or bit depths.
Innovation Solution
An image processing device with modules connected in a pipeline or directed acyclic graph form, where each module has a buffer and a control section that optimizes data processing units, allowing for flexible combination of modules without requiring uniform output units, and shares common program components for modules with similar data handling tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If image processing modules are combined in arbitrary order to process different image data with varying color spaces or bit depths, then flexibility and adaptability are improved, but the structural complexity of each module increases due to the need for uniform output units and control sections
Solution Approach 1:
The patent implements a universal data structure where all image processing modules use a common data unit format comprising pixel data, valid pixel flags, and line flags. This universal structure allows modules to process different types of image data (varying color spaces, bit depths, and formats) without requiring custom output units for each module type, thereby achieving flexibility while maintaining uniform module structure
Solution Approach 2:
The patent changes the parameter representation by using flag-based validation (valid pixel flags and line flags) instead of requiring uniform data formats. This allows the same module structure to handle variable parameters such as different color spaces, bit depths, and image formats by simply adjusting the flag states rather than restructuring the module architecture
2Reliability
If control sections are added to each image processing module to manage data receipt and transfer between connected modules, then the ability to coordinate processing between modules is improved, but the complexity of each module structure increases
Solution Approach 1:
The patent implements self-service control where each image processing module autonomously manages its own input and output data streams using standardized interfaces. The control logic is embedded within the universal data structure itself (through valid pixel flags and line flags), eliminating the need for separate external control sections while maintaining reliable coordination between modules through self-contained error handling and data validation
3Manufacturing precision
If buffer memory capacities are changed to match the processing contents of connected image processing modules, then the accuracy of data storage is improved, but the adaptability to module changes is reduced
Solution Approach 1:
The patent creates universal buffer memory structures that can accommodate any image processing module output through the standardized data unit format. The buffer capacity is determined by the universal structure requirements rather than specific module characteristics, allowing the same buffer design to accurately store data from any module combination while maintaining adaptability to module changes
Data Source
AI summary
An image processing device including an image processing section having: one or more image processing modules, each image processing module having an image processing engine and a control section; and one or more buffer modules having a buffer for storing image data. The image processing module is realized by a program, which corresponds to the image processing engine, and a program, which corresponds to the control section, being executed by a CPU of the image processing device, and a portion of or an entirety of the program corresponding to the control section is used in common for, among the plurality of types of image processing modules, image processing modules whose units of writing image data to the buffer of the buffer module connected at the following stage of its own module are the same.