Image Signal Processor Data Reordering for Smaller Buffers

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Solution Overview

Problem

Existing imaging systems face challenges in reducing the size of buffers and processing time for image signal processors, particularly in devices with high data volume and processing demands.

Innovation Solution

The imaging system employs a frame memory component and an image signal processor that reorders and processes image data in a direction different from its input direction, using a buffer circuit to store and align data efficiently, allowing for parallel time division processing and reducing the number of required buffers and processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If image data is processed in the same direction as input (raster scan direction), then data processing is straightforward, but buffer size and processing time increase

Engineering Contradiction:
Improvebuffer sizeVSAvoiddata processing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies inversion by processing image data in a direction opposite to the raster scan input direction. Specifically, it processes data vertically (row by row) instead of horizontally (pixel by pixel), which fundamentally changes the data flow pattern and enables more efficient buffer utilization and parallel processing.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from one-dimensional pixel-by-pixel processing to two-dimensional row-by-row processing. By adding the vertical dimension to data processing, it enables parallel time division processing across multiple rows, thereby reducing buffer requirements and processing time while maintaining the same input/output interface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If more buffers are added to handle high data volume, then data processing capacity increases, but device complexity and cost increase

Engineering Contradiction:
Improvedata processing capacityVSAvoidnumber of buffers
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

By inverting the data processing direction from horizontal to vertical, the patent enables a single buffer to handle the entire image data volume through row-by-row processing. This eliminates the need for multiple buffers that would traditionally be required to handle high data volumes, thereby reducing device complexity while maintaining processing capacity.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent makes a single buffer universal by enabling it to perform multiple functions: storing entire rows of image data, facilitating parallel processing across different rows, and managing data flow efficiently. This multi-functional buffer replaces what would traditionally require multiple specialized buffers, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If processing speed is increased to handle high data volume, then productivity improves, but the number of circuits and device complexity increase

Engineering Contradiction:
Improveprocessing speedVSAvoidnumber of circuits
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent adds the vertical dimension to data processing, enabling parallel time division processing across multiple rows. This dimensional change allows a single processing circuit to handle high data volumes by processing different rows simultaneously in parallel, thereby increasing processing speed without requiring multiple separate circuits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent enables a single processing circuit to perform multiple processing operations by processing different rows of image data in parallel. This universal circuit can handle various processing tasks across different data rows, thereby increasing overall processing speed without proportionally increasing the number of circuits required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12445748B2Image signal processor and imaging system including the same
Publication Date: 2025.10.14 SK HYNIX INC
  • US12445748B2 patent drawing
  • US12445748B2 patent drawing
  • US12445748B2 patent drawing

AI summary

An imaging system includes a frame memory component configured to perform a read operation or a write operation of image data. The imaging system also includes an image signal processor configured to write the image data input into the frame memory component in a predetermined order, process data read from the frame memory component, and output the processed image data. The image signal processor converts an order of processing the image data to a direction different from a direction in which the image data is input, process the resultant data, aligns the order of the processed image data in the predetermined order, and outputs the resultant data.