Dynamic Resource Voting for Image Processor FPS Synchronization
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Solution Overview
Problem
Existing dynamic resource voting (DRV) schemes fail to synchronize dynamically changing frame rates with hardware timers in fast sensor readout (FSR) modes, leading to image frame drops and hardware hangs due to asynchronous communication interfaces.
Innovation Solution
Implement a timing indicator, such as a pre-start of frame (PRE-SOF) indicator, to synchronize the voltage and clock levels of the image processor and DDR with the sensor's frame rate, ensuring synchronous operation and avoiding mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a timing indicator is implemented to synchronize DRV and frame rate, then system reliability is improved, but device complexity increases
Solution Approach 1:
A timing indicator (PRE-SOF packet) is introduced as an intermediary signal between the sensor and DRV engine. This indicator carries timing information about upcoming frame rates and enables synchronous operation without requiring complex direct coupling between the asynchronous components. The timing indicator acts as a mediator that translates sensor timing information into DRV-controllable parameters.
2Reliability
If FSR mode is used to improve image quality and reduce sensor power, then image quality and sensor power consumption are improved, but synchronization between DRV and frame rate becomes more difficult
Solution Approach 1:
The timing indicator provides advance notice of upcoming frame rate changes and FSR mode transitions. By knowing the timing of these events beforehand, the DRV engine can proactively adjust clock rates and voltage levels before they are needed, ensuring smooth transitions without synchronization conflicts. This preliminary action prevents the timing mismatches that would otherwise occur with dynamic FPS changes.
Data Source
AI summary
Disclosed are systems, apparatuses, processes, and computer-readable media for image processing. For example, a computing device can output (e.g., transmit) a timing indicator for synchronization of a voting engine and a frame rate for processing image frames obtained by a sensor. The computing device can obtain a positive voting result from the voting engine based on the timing indicator. The computing device can increase a clock rate and a voltage for a power source shared by an image processor and at least one memory based on the positive voting result to produce an updated clock rate and an updated voltage. The computing device can apply the updated clock rate and the updated voltage to the image processor and the at least one memory.