Image Recording Circuit Transposition Processor
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Solution Overview
Problem
Existing image recording apparatuses face inefficiencies in converting image data into frame data for digital micromirror devices (DMDs), leading to time-consuming data processing and potential mismatches in data processing rates between external processing apparatuses and exposure apparatuses, resulting in increased costs and reduced recording efficiency.
Innovation Solution
An image recording processing circuit that generates frame sequential data efficiently for each image recording component group, incorporating a CAD apparatus, raster image processor, and exposure recording apparatus with a transposition processor to convert run-length data into bitmap data and then frame data, allowing for flexible system design and reduced data processing burdens.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If image data are converted into frame data for DMD memory cells, then the two-dimensional image can be recorded on the exposure surface, but the data conversion process becomes highly burdensome and time-consuming
Solution Approach 1:
The patent applies preliminary action by pre-converting image data into frame data format and storing it in memory before the exposure process. The frame data conversion is performed in advance (prior to the actual imaging operation), allowing the DMD to directly use the pre-processed data during exposure without performing time-consuming conversions in real-time, thus resolving the contradiction between recording precision and conversion time
Solution Approach 2:
The patent segments the data processing task by dividing the large image data into smaller frame data units that correspond to the DMD memory cell structure. This segmentation allows the data to be organized into manageable chunks (frames) that can be efficiently stored and processed, reducing the overall conversion burden while maintaining image recording precision
2Adaptability or versatility
If external processing apparatus and exposure apparatus have different data processing rates, then system flexibility is maintained, but one apparatus becomes the limiting factor and causes specification overkill
Solution Approach 1:
The patent introduces an intermediary buffer memory that decouples the data processing rates between the external processing apparatus and the exposure apparatus. This intermediary component allows data to be transferred at different rates without causing synchronization issues or specification overkill, enabling system flexibility while avoiding the need for all components to operate at the same processing rate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables quick and efficient generation of frame sequential data, enhancing the flexibility of system design and reducing the burden on data processing, thereby improving the recording of two-dimensional images on image recording surfaces without requiring synchronized data processing rates between apparatuses.
Implementation Method 1
The micromirrors have respective reflecting surfaces whose angles are changed when the micromirrors are tilted by controlling electrostatic forces due to electric charges stored in the memory cells
Data Source
AI summary
Mirror sequential data supplied from an RIP are temporarily stored as divided data in memory banks of an intermediate memory. Thereafter, the stored mirror sequential data are read in blocks. Then, a transposition processor transposes a matrix of the mirror sequential data into frame sequential data, and supplies the frame sequential data to a DMD controller.