Image Sensor ADC Circuit With Floating Node for Noise and Input Range
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Solution Overview
Problem
Current CMOS image sensors face challenges in enhancing image quality due to noise and limited input range, particularly in analog-to-digital conversion processes.
Innovation Solution
An amplifier and analog-to-digital converter (ADC) system is designed with a first circuit that receives analog signals from pixels and generates output signals, and a second circuit with a select transistor and capacitor configuration to apply voltage to a floating node, enabling noise reduction and increased input range through adaptive bias current control and Miller capacitor integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC circuits are used in CMOS image sensors, then the device complexity is low, but noise increases and input range is limited
Solution Approach 1:
The ADC circuit is divided into two separate circuits: a first circuit that performs analog-to-digital conversion and a second circuit that applies voltage to the floating node. This segmentation allows each circuit to be optimized independently, with the first circuit minimizing noise and the second circuit managing input range, thereby improving overall image signal quality while controlling noise levels.
Solution Approach 2:
A floating node is introduced as an intermediary element between the first and second circuits. This floating node serves as a mediator that isolates the noise-sensitive conversion process from the voltage application process, allowing the first circuit to operate with minimal noise interference while the second circuit manages the input range through voltage control.
2Adaptability or versatility
If conventional ADC circuits are used in CMOS image sensors, then the device complexity is low, but input range is limited
Solution Approach 1:
The second circuit dynamically adjusts the voltage applied to the floating node based on the operation phase. During the conversion phase, the floating node is held at a specific voltage to maximize input range, while during other phases, the voltage is adjusted to optimize performance. This dynamic voltage control expands the input range without requiring a completely redesigned circuit architecture.
Solution Approach 2:
The first circuit performs multiple functions: it conducts the analog-to-digital conversion and simultaneously serves as the input stage for the second circuit. This multi-functionality reduces the need for additional dedicated circuits, thereby expanding the effective input range without proportionally increasing device complexity.
3Object-generated harmful factors
If bandwidth is limited in the first output signal, then noise is reduced, but processing speed may be affected
Solution Approach 1:
The bandwidth limiting is applied periodically only during the decision operation phase rather than continuously. During the conversion phase, the circuit operates with full bandwidth to maintain processing speed, while during the decision phase when noise is most critical, the bandwidth is limited. This periodic application of bandwidth limiting reduces noise when necessary while minimizing impact on overall processing speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces noise and expands the input range, improving image signal quality by limiting bandwidth and enhancing the ADC's performance in image sensing devices.
Implementation Method 1
a capacitor connected in parallel between an input (e.g., a gate) and an output (e.g., a drain) of the select transistor
Data Source
AI summary
An image sensing device including a pixel array including a plurality of pixels and an analog-to-digital converter (ADC) configured to convert an analog signal into a digital signal is provided. The ADC includes a first circuit configured to receive the analog signal from a selected pixel among the plurality of pixels and generate a first output signal and a second circuit including a select transistor configured to apply a voltage to a floating node electrically connected to the select transistor based on the first output signal. The second circuit further includes a capacitor connected in parallel between a gate and a drain of the select transistor and an output circuit connected to the floating node and configured to output the digital signal based on the applied voltage to the floating node.