Image Sensor ADC Synchronization for Fast Low-Power Conversion

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Solution Overview

Problem

Existing analog-to-digital converters for image sensors face challenges in achieving high-speed conversion while minimizing power and area consumption, particularly in image sensors with low pixel pitch and a large number of pixels, and they struggle with scalability as technology nodes shrink.

Innovation Solution

The proposed analog-to-digital converter incorporates a counter circuit, storage circuit, comparator circuit, synchronization circuit, and latch circuit to generate counter bits and control signals efficiently, allowing for asynchronous counter cells and shared counter elements across multiple pixel columns, reducing power and area consumption and enabling high-speed conversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional group-parallel single-slope ADCs are used for high-speed conversion, then conversion speed is improved, but power consumption and area consumption increase

Engineering Contradiction:

Improveconversion speedVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The pixel array is divided into multiple pixel groups, with each group having its own dedicated counter circuit. This segmentation allows parallel processing of multiple pixel groups simultaneously, maintaining high conversion speed while reducing the power and area overhead compared to a fully parallel architecture, as each counter circuit serves a specific group rather than requiring all counters to operate at full capacity continuously

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A periodic ramp signal is generated and applied to multiple pixel groups in a cyclic manner. The ramp signal periodically resets and increments, allowing the ADC to process different pixel groups at different time intervals within a periodic cycle. This periodic action enables time-multiplexed processing that achieves high overall conversion speed while keeping individual counter circuits active only during their assigned time slots, reducing average power consumption

Inventive Principle:

Principle #19Periodic action

2Speed

If traditional group-parallel single-slope ADCs are used for high-speed conversion, then conversion speed is improved, but area consumption increases

Engineering Contradiction:

Improveconversion speedVSAvoidarea consumption

Core Design Contradiction:

SpeedVSArea of stationary object

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each counter circuit is designed to be universal and can process multiple pixel groups over time through the periodic ramp signal mechanism. While physically dedicated to one group for speed, the counter circuits are time-multiplexed across different groups in a periodic fashion, giving them multi-functional capability that reduces the total number of counter circuits needed compared to a fully static parallel architecture

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Quantity of substance

If the number of pixels is increased in dense pixel arrays, then image sensor resolution is improved, but power consumption and area consumption of ADC increases

Engineering Contradiction:

Improvenumber of pixelsVSAvoidpower consumption

Core Design Contradiction:

Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #19Periodic action

4Quantity of substance

If the number of pixels is increased in dense pixel arrays, then image sensor resolution is improved, but area consumption of ADC increases

Engineering Contradiction:

Improvenumber of pixelsVSAvoidarea consumption

Core Design Contradiction:

Quantity of substanceVSArea of stationary object

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11770640B2Analog-to-digital converter for an image sensor

Publication Date: 2023.09.26 AMS SENSORS BELGIUM BVBA

AI summary

An analog-to-digital converter for an image sensor comprises a counter circuit to generate a respective counter bit in response to a counter state of the counter circuit, and a storage circuit for storing a respective storage state in response the respective counter bit. The converter further comprises a comparator circuit for generating a level of a comparison signal, and a synchronization circuit to generate a write control signal for controlling the storing of the respective storage state in the respective storage cell. The counter circuit is configured to change the counter state, when a first edge of a cycle of the clock signal is applied to the counter circuit, and to generate the write control signal, when a second edge of the cycle of the clock signal being subsequent to the first edge of the cycle of the clock signal is applied to the synchronization circuit.