Image Sensor Alignment Mark Integration with Light Shielding
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Solution Overview
Problem
Conventional image sensor package manufacturing methods require an additional exposure process to form alignment marks, increasing manufacturing costs and potentially reducing alignment accuracy.
Innovation Solution
Incorporating an alignment mark layer surrounded by a lattice structure and dummy color filters at the same level as the semiconductor substrate, with a light shielding layer between the substrate and the alignment mark layer, allowing for precise alignment without additional exposure processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If an additional exposure process is performed to form the alignment mark on the glass, then the alignment mark can be formed, but the manufacturing costs increase
Solution Approach 1:
The alignment mark layer is integrated into the image sensor chip structure during the standard manufacturing process, merging the alignment mark formation with the chip fabrication. This eliminates the need for separate exposure processes and reduces manufacturing costs while maintaining alignment accuracy.
Solution Approach 2:
The alignment mark layer is formed preliminarily during the chip manufacturing process before the final assembly. By preparing the alignment marks in advance as part of the chip structure, the patent avoids additional exposure steps and reduces overall manufacturing complexity and cost.
2Ease of manufacture
If the alignment mark is formed on the glass separately, then the alignment can be performed, but the alignment accuracy may be reduced
Solution Approach 1:
The alignment mark layer is merged with the image sensor chip structure, ensuring that the alignment marks are formed with the same precision as the chip itself. This integration maintains high alignment accuracy while simplifying the manufacturing process by eliminating separate formation steps.
Solution Approach 2:
The patent replaces separate mechanical alignment processes with an integrated alignment mark system formed during chip fabrication. The alignment marks are precisely positioned through the chip manufacturing process itself, substituting post-fabrication mechanical alignment with precision built into the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances alignment accuracy while reducing manufacturing costs by integrating the alignment mark within the image sensor chip formation process, ensuring precise alignment of the image sensor package without additional exposure steps.
Implementation Method 1
A light shielding layer is disposed between the semiconductor substrate and the alignment mark layer and between the semiconductor substrate and the dummy color filters
Data Source
AI summary
An image sensor chip includes a wiring layer. A semiconductor substrate is on the wiring layer and includes a photoelectric converter. A lattice structure is on the semiconductor substrate. An alignment mark layer is on the semiconductor substrate and is surrounded by the lattice structure in a plan view. Dummy color filters are on the semiconductor substrate and surrounded by the lattice structure in the plan view. An upper planarization layer is on the alignment mark layer and the dummy color filters. A light shielding layer is disposed between the semiconductor substrate and the alignment mark layer and between the semiconductor substrate and the dummy color filters. The alignment mark layer and the dummy color filters are disposed at a same level with respect to a top surface of the semiconductor substrate. The dummy color filters surround at least a portion of the alignment mark layer in the plan view.