Image Sensor Readout Layout for Horizontal Analog Binning

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Solution Overview

Problem

Existing image sensors struggle to perform efficient analog binning operations, particularly in a horizontal direction, which limits their ability to improve frame rates and readout speeds.

Innovation Solution

The image sensor design includes a pixel array with unit pixel circuits arranged in a grid structure, connected to readout lines and readout circuits via a path selector, allowing for analog binning operations during a single row time in a binning mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If analog binning operation is performed in horizontal direction, then frame rate and readout speed are improved, but device complexity increases due to path selector and additional readout lines

Engineering Contradiction:
Improveframe rateVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The pixel array is divided into multiple pixel groups (first to fourth pixel groups) that can be independently connected to different readout circuits through the path selector. This segmentation allows simultaneous readout of multiple pixel groups, improving frame rate while managing complexity through modular organization

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a horizontal binning dimension by connecting pixel groups across different columns to the same readout circuit. The path selector enables horizontal direction binning by routing signals from multiple columns through selected readout lines, adding a temporal dimension to the readout process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If analog binning operation is performed in horizontal direction, then readout speed is improved, but area increases due to additional readout lines and path selector

Engineering Contradiction:
Improvereadout speedVSAvoidarea
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The readout lines serve multiple functions: they can connect to different pixel groups at different times and support both normal readout mode and binning mode operations. The path selector enables the same readout infrastructure to be used for both horizontal and vertical binning operations, reducing the need for dedicated hardware

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The path selector provides dynamic reconfiguration of the readout architecture, allowing the system to switch between different connection patterns (normal mode, horizontal binning, vertical binning) based on operational requirements. This dynamic switching optimizes performance without permanently increasing area

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If path selector is added to enable binning mode, then binning operation capability is improved, but ease of manufacture decreases

Engineering Contradiction:
Improvebinning operation capabilityVSAvoidease of manufacture
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The path selector acts as an intermediary component that mediates between the pixel groups and readout circuits, enabling binning operations without requiring fundamental changes to the pixel or readout circuit design. This intermediary approach simplifies manufacturing by keeping the core components unchanged

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12294803B2Image sensor for performing an analog binning operation
Publication Date: 2025.05.06 SK HYNIX INC
  • US12294803B2 patent drawing
  • US12294803B2 patent drawing
  • US12294803B2 patent drawing

AI summary

Disclosed is an image sensor including first to fourth, fifth to eighth, ninth to 12th and 13th to 16th unit pixel circuits, a first readout line connected to the first and ninth unit pixel circuits, a second readout line connected to the fifth and 13th unit pixel circuits, a third readout line connected to the second and 10th unit pixel circuits, a fourth readout line connected to the sixth and 14th unit pixel circuits, a fifth readout line connected to the third and 11th unit pixel circuits, a sixth readout line connected to the seventh and 15th unit pixel circuits, a seventh readout line connected to the fourth and 12th unit pixel circuits, an eighth readout line connected to the eighth and 16th unit pixel circuits, first to fourth readout circuits, and a path selector connecting the unit pixel circuits to the readout circuits via the readout lines.