Stacked Image Sensor Bonding Layout for Reliable Signal Transfer
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Solution Overview
Problem
Current image sensors face challenges in enhancing product reliability, particularly in the design and integration of semiconductor chips for improved performance and efficiency in light detection and signal processing.
Innovation Solution
The image sensor design involves a stacked configuration of semiconductor chips with a first substrate having a photoelectric conversion element and a floating diffusion region connected through wiring structures, allowing for efficient light detection and signal processing, with a color filter and microlens arrangement for enhanced light reception and a dual conversion gain transistor for improved signal amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a stacked configuration of semiconductor chips is used, then integration efficiency and light detection capability are improved, but device complexity increases
Solution Approach 1:
The image sensor is divided into multiple separate semiconductor chips (first substrate, second substrate, third substrate) that are stacked and bonded together. Each substrate contains specific functional elements (photoelectric conversion elements, transistors, wiring structures) that are independently fabricated and then integrated through bonding pads and wiring layers, enabling modular manufacturing and improved integration efficiency while managing complexity through functional segmentation.
Solution Approach 2:
The patent transitions from a planar two-dimensional layout to a three-dimensional stacked configuration. Multiple substrates are arranged vertically in layers along the thickness direction, with bonding pads and wiring structures connecting corresponding elements across different layers. This vertical stacking enables higher integration density and improved light detection capability by utilizing the third dimension (height/depth) rather than expanding horizontally.
2Reliability
If multiple substrates are stacked with direct bonding pad contact, then connection reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The bonding pads are pre-formed on each substrate at designated locations before the stacking process. The first substrate has first bonding pads, the second substrate has second bonding pads positioned to align with the first, and the third substrate has third bonding pads aligned with both. This preliminary positioning and pre-alignment of bonding pads on each individual substrate reduces the precision requirements during the final stacking assembly, as the alignment references are already established on each component.
3Measurement precision
If wiring structures connect floating diffusion region to impurity region across substrates, then signal processing capability is improved, but parasitic capacitance increases
Solution Approach 1:
The wiring structures that connect the floating diffusion region to the impurity region are routed through the vertical stacking dimension rather than extending horizontally across the substrate plane. The first wiring structure on the first substrate and the second wiring structure on the second substrate are positioned vertically aligned, creating shorter connection paths that reduce parasitic capacitance while maintaining signal processing capability across the stacked substrates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability and efficiency of image sensors by improving light detection and signal processing capabilities, increasing conversion gain, and reducing parasitic capacitance, leading to better image quality and sensor performance.
Implementation Method 1
A photoelectric conversion element is in the first substrate
Data Source
AI summary
An image sensor includes a first substrate having a photoelectric conversion element. A first gate electrode is on a first side of the first substrate. A floating diffusion region is in the first substrate. A first wiring structure is on the first side and includes a first wiring layer and a first bonding pad. A second substrate has a third side that includes second and third gate electrodes. An impurity region is in the second substrate. A second wiring structure is on the third side and includes a second wiring layer and a second bonding pad directly contacting the first bonding pad. A fourth gate electrode is on a fourth side of the second substrate. A third wiring structure is on the fourth side and includes a third wiring layer. The floating diffusion region is connected to the impurity region through the first wiring structure and the second wiring structure.