Image Sensor Bridge Interface Decoupling FPGA Logic
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Solution Overview
Problem
Media handling devices require customized Field-Programmable Gate Arrays (FPGAs) to process Ultraviolet (UV) and Infrared (IR) image data, making the architecture non-portable and processor-dependent, limiting the ability to swap or upgrade processors without modifying the FPGA logic.
Innovation Solution
An image sensor bridge interface that embeds UV and IR data within the video feed's horizontal, vertical, or active video components, allowing standard video interfaces to provide these data to the processor, decoupling the FPGA from processor dependencies and enabling processor replacement or upgrade without affecting UV and IR data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If customized FPGAs are used to process UV and IR image data, then the media handling device can evaluate UV and IR values, but the architecture becomes non-portable and processor-dependent
Solution Approach 1:
The patent extracts UV and IR data processing from the customized FPGA logic and embeds it within the standard video feed signal stream. By separating the UV/IR data extraction function from the processor-specific FPGA implementation, the solution enables standard processors to handle UV and IR data without requiring customized FPGA logic, thus improving processor portability while maintaining UV and IR evaluation capability
Solution Approach 2:
The patent makes the video interface universal by embedding UV and IR data within the standard video feed that can be processed by any standard processor. The bridge interface is designed to work with standard video interfaces rather than processor-specific interfaces, allowing the same hardware architecture to support different processor types and enabling future processor upgrades without FPGA modifications
2Productivity
If customized FPGAs are modified to accommodate improved processors, then processor throughput can be improved, but the FPGA logic must be updated
Solution Approach 1:
The patent removes the dependency between FPGA logic and processor specifications by extracting UV/IR data processing from the processor-specific implementation. The bridge interface handles UV/IR data extraction independently of the processor type, allowing processors to be upgraded for improved throughput without requiring corresponding FPGA logic updates
Solution Approach 2:
The patent segments the image data processing into standard video feed components that can be independently processed. By dividing the UV/IR data into the video signal structure, the system separates data extraction from processor-specific operations, enabling processor improvements without increasing FPGA logic complexity
3Reliability
If non-standard interfaces are used for processors with UV and IR capabilities, then UV and IR image values can be handled, but the FPGAs cannot be swapped or upgraded
Solution Approach 1:
The patent creates a universal bridge interface that works with standard video interfaces rather than processor-specific non-standard interfaces. The UV and IR data are embedded in the standard video feed format, making them accessible to any standard processor without requiring custom interfaces, thus enabling FPGA swapability while maintaining UV and IR handling capability
Solution Approach 2:
The patent introduces a standard video feed as an intermediary between the image sensor and processor. Instead of requiring direct non-standard connections for UV/IR data, the bridge interface mediates by embedding UV/IR data in the standard video stream, allowing standard processors to access UV/IR data without specialized interfaces, thereby improving FPGA interchangeability
Data Source
AI summary
An image sensor bridge interface is provided. The interface is situated between an image sensor and a processor. The interface comprises an integrated circuit. The integrated circuit comprises a Field-Programmable Gate Array (FPGA) decoupled from both image signals provided from the image sensor and a processor connected to the integrated circuit. The FPGA separates Ultraviolet (UV) and Infrared (IR) data values from image sensor-provided image data and embeds the UV and IR data values within the horizontal blanking, vertical blanking, and/or active video components of a video feed. The video feed provided from the integrated circuit to the processor using a standard video interface, and the processor providing the video feed or providing UV images, IR images, and Red, Green, and Blue (RGB) images separated from the video feed to a computing core of a host device.