Image Sensor Capacitor Vertical Stacking for Fill Factor
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Solution Overview
Problem
Conventional global shutter image sensors have a large capacitor that occupies most of the area, reducing the photodiode area and resulting in lower fill factor and increased parasitic light sensitivity.
Innovation Solution
The design includes a capacitor with a thin dielectric layer between a first and second electrode, where the second electrode extends to the edge of the photodiode, providing a light shielding effect and reducing parasitic light sensitivity, while the conductive plug and inter-layer dielectric layer configuration increases the photodiode area and fill factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large capacitor is arranged to increase storage capacitance, then the performance of global shutter image sensor is improved, but the capacitor occupies more than half of the area resulting in smaller photodiode area
Solution Approach 1:
The capacitor structure transitions from a planar layout to a three-dimensional stacked configuration, with the first electrode on the semiconductor substrate, the dielectric layer above it, and the second electrode above the dielectric layer. This vertical stacking allows the capacitor to achieve high storage capacitance without occupying excessive lateral area, thereby preserving photodiode area while meeting capacitance requirements.
2Area of moving object
If the area of the capacitor is reduced, then the photodiode area is increased, but poor image reading is obtained
Solution Approach 1:
The invention changes the key parameter of the capacitor from lateral area to vertical height by introducing a dielectric layer with high dielectric constant and increasing the electrode separation distance. This allows the capacitor to maintain high storage capacitance with reduced lateral footprint, enabling larger photodiode area while preserving image reading quality through adequate capacitance.
3Reliability
If the capacitor occupies large area, then storage capacitance is sufficient, but parasitic light sensitivity increases and fill factor decreases
Solution Approach 1:
By stacking the capacitor vertically with the semiconductor substrate as the base layer, the dielectric layer in the middle, and the electrode structures above, the design achieves sufficient storage capacitance in the vertical dimension rather than expanding laterally. This reduces the capacitor's lateral footprint, thereby decreasing parasitic light sensitivity and increasing the fill factor while maintaining adequate capacitance for global shutter operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the fill factor and reduces parasitic light sensitivity by increasing the capacitance value and area of the photodiode, while the light shielding effect minimizes image distortion and dark current.
Implementation Method 1
the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to an edge of the photodiode, and a dielectric layer between the first and the second electrodes
Implementation Method 2
the second electrode on the first electrode and extending to an edge of the photodiode, providing a light shielding effect and reducing parasitic light sensitivity
Data Source
AI summary
An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed over the photodiode, a first transfer transistor, a second transfer transistor and a capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor, wherein the first transfer transistor is coupled to the photodiode. The capacitor is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to an edge of the photodiode, and a dielectric layer between the first and the second electrodes.