Image Sensor Clock Circuit With RC Noise Filtering and Current Control

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Solution Overview

Problem

Conventional clock generation circuits in image sensors are prone to noise interference and high discharging currents, which can lead to increased power consumption and potential circuit damage.

Innovation Solution

A clock generation circuit comprising a first RC circuit, a first switch, a second RC circuit, a second switch, a comparator, and a logic circuit, where the second RC circuit filters noise and reduces discharging time by controlling the discharging current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the discharging current is increased to reduce discharging time, then the discharging time is reduced, but the power consumption increases and the circuit may burn

Engineering Contradiction:
Improvedischarging timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSLoss of energy

Solution Approach 1:

The patent employs dynamic control of the discharging process by using a comparator to monitor the voltage across the capacitor and control the switch accordingly. The switch is turned off when the voltage reaches a predetermined threshold, dynamically adjusting the discharging current to prevent excessive power consumption and circuit damage while maintaining efficient discharging time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The comparator provides feedback control by continuously monitoring the capacitor voltage and comparing it with a reference voltage. This feedback mechanism allows the system to automatically adjust the discharging process, turning the switch off when the voltage reaches the threshold level, thereby preventing excessive current and power consumption while maintaining optimal discharging time.

Inventive Principle:
Principle #23Feedback

2Reliability

If the routing between the input of the operation voltage and the component inside the IC is made long and complicated, then the voltage supply is ensured, but the component may be affected by noises

Engineering Contradiction:
Improvevoltage supply stabilityVSAvoidnoise interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the noise filtering function by introducing a separate RC circuit specifically dedicated to noise filtering. This RC circuit is connected to the clock signal input and operates independently to filter out noise components before they reach the main circuit components, thereby maintaining voltage supply stability while eliminating noise interference.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The RC circuit serves as an intermediary element between the noisy input signal and the sensitive circuit components. It mediates the signal by filtering out high-frequency noise components while allowing the useful clock signal to pass through, thus protecting the components from noise interference while maintaining proper voltage supply.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively filters noise, reduces discharging time, decreases power consumption, and prevents circuit damage by managing the discharging current efficiently.

Implementation Method 1

the second RC circuit, coupled to the first switch

Methodology Applied
Scientific EffectRC filtering: Filter (electronic)

Implementation Method 2

The comparator comprises: a first input terminal, coupled to the second RC circuit and the second switch; a second input terminal, configured to receive a reference voltage level

Methodology Applied
Scientific EffectVoltage comparison:

Data Source

PatentUS12225306B2Clock generation circuit and image sensor
Publication Date: 2025.02.11 PIXART IMAGING INC
  • US12225306B2 patent drawing
  • US12225306B2 patent drawing
  • US12225306B2 patent drawing

AI summary

A clock generation circuit, comprising a first RC circuit, a first switch, a second RC circuit, a second switch, a comparator and a logic circuit. The first RC circuit comprises a first capacitor, coupled to a first predetermined voltage level and a second predetermined voltage level. The second RC circuit comprises a second capacitor, coupled to the first switch. The comparator comprises: a first input terminal, coupled to the second RC circuit and the second switch; a second input terminal, configured to receive a reference voltage level; and an output terminal, coupled to a control terminal of the first switch and a control terminal of the second switch. The logic circuit is coupled to the output terminal of the comparator, configured to generate a clock signal. In one embodiment, the clock generation circuit is applied to an image sensor.