Image Sensor Column Line Precharging for Read-Out Speed

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The existing image sensing devices face a slowdown in read-out speed due to the settling time required for the voltage level of the column line to rise from a low voltage to the target reset signal level, which increases with higher resolution, necessitating a technology to reduce this settling time.

Innovation Solution

The implementation of a precharge block that precharges the read-out line or column line to a voltage level corresponding to the initial voltage level of the pixel signal during the row non-selection section, utilizing a replica or dummy pixel to replicate the pixel structure and precharge the column line to a voltage level similar to the reset signal, thereby minimizing the settling time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the column line voltage is allowed to drop to low voltage level between row selections, then power consumption is reduced and signal levels are restored, but the settling time increases and read-out speed decreases

Engineering Contradiction:

Improvepower consumptionVSAvoidread-out speed

Core Design Contradiction:

Loss of energyVSSpeed

Solution Approach 1:

The patent applies preliminary action by precharging the column line to an intermediate voltage level during the row non-selection period, before the next row selection begins. This advance preparation reduces the voltage transition time required when the next row is selected, thereby decreasing settling time and increasing read-out speed without significantly increasing power consumption, as the precharge current can be controlled and is applied during otherwise idle time

Inventive Principle:

Principle #10Preliminary action

2Speed

If the settling time is reduced by precharging the column line, then read-out speed is improved, but additional circuit complexity is introduced

Engineering Contradiction:

Improveread-out speedVSAvoidcircuit complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary precharge block that acts as a mediator between the pixel array and the read-out circuitry. This block contains an intermediate voltage node that serves as a buffer, allowing the column line to be precharged to an intermediate level rather than requiring direct high-speed switching. This intermediary approach reduces read-out speed limitations while keeping the added circuit complexity manageable through modular design

Inventive Principle:

Principle #24Intermediary (Mediator)

3Loss of time

If the column line is precharged to reset signal level, then settling time is minimized, but power consumption during non-selection increases

Engineering Contradiction:

Improvesettling timeVSAvoidpower consumption

Core Design Contradiction:

Loss of timeVSLoss of energy

Solution Approach 1:

The patent applies local quality by precharging only the necessary portion of the column line to the intermediate voltage level during the non-selection period, rather than charging the entire column line to full reset level. The precharge block selectively charges the column line based on the specific timing and voltage requirements of the upcoming row selection, optimizing the balance between reducing settling time and minimizing unnecessary power consumption in other parts of the circuit

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS11070759B2Image sensing device comprising dummy pixel row and active pixel rows coupled to read-out column line, and using a high speed active pixel row read-out method that reduces settling time by precharging the column line during a dummy pixel row selection time between active pixel row selection times

Publication Date: 2021.07.20 SK HYNIX INC

AI summary

An image sensing device includes a pixel suitable for outputting a pixel signal through a read-out line during a read-out section and a precharge block suitable for precharging the read-out line to a voltage level corresponding to an initial voltage level of the pixel signal during a row non-selection section adjacent to the read-out section.