Image Sensor Comparator Cascode Circuit for Low-Voltage Input Range
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Solution Overview
Problem
Existing image sensors face challenges in securing a sufficient input range for comparators operating at low voltage supply power, leading to increased power consumption and erratic behavior at lower voltage levels.
Innovation Solution
A comparator design incorporating a first input transistor, a second input transistor, a first load transistor, and a first cascode transistor, along with a common current source, to maintain a sufficient input range and operate normally at low voltage by increasing the auto-zero level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the comparator operates at low voltage supply power, then power consumption is reduced, but the input range becomes insufficient and operation becomes erratic
Solution Approach 1:
The comparator is divided into multiple functional blocks: a first comparator for initial comparison, a second comparator for refined comparison, and a switch for controlling signal transmission. This segmentation allows each block to operate optimally at low voltage while maintaining overall input range sufficiency through coordinated operation of the segments
Solution Approach 2:
A switch is introduced as an intermediary component between the first and second comparators. The switch controls the transmission of comparison results and enables the system to maintain sufficient input range at low voltage by selectively activating appropriate comparison paths based on input signal conditions
Data Source
AI summary
Provided is a comparator of an image sensor, the comparator including a first input transistor configured to receive a reference signal, a second input transistor configured to receive an input signal, a first load transistor configured to output a first output signal to a first output node based on a difference between the reference signal and the input signal, and a first cascode transistor coupled to the first input transistor and the first output node.