Multi-Substrate Image Sensor Pixels for Corner-Rounding Limits
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in achieving sub-micron pixel pitches due to corner rounding in patterned photoresist, leading to processing variance and performance issues, especially as feature sizes decrease.
Innovation Solution
The implementation of a multi-substrate image sensor structure that stacks complementary metal-oxide semiconductor (CMOS) image sensors, distributing components across multiple substrates to reduce pixel pitch while mitigating corner rounding effects, allowing for pixel pitches of less than 0.5 μm with a photosensitive area of greater than 25% of the total pixel area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If conventional single-substrate image sensor structure is used, then device complexity is low, but pixel pitch cannot be reduced below 0.5 μm due to corner rounding effects
Solution Approach 1:
The patent transitions from a planar single-substrate architecture to a three-dimensional multi-substrate stacked configuration. By distributing pixel cell circuitry across multiple vertically stacked substrates, the design achieves reduced pixel pitch (below 0.5 μm) while managing complexity through vertical integration rather than lateral expansion.
Solution Approach 2:
The image sensor is divided into multiple substrate layers, with each substrate containing specific pixel cell circuitry. This segmentation allows the corner rounding effects to be distributed across multiple substrates rather than concentrated in one, enabling reduced pixel pitch while maintaining manufacturability through modular fabrication.
2Measurement precision
If pixel pitch is reduced to increase resolution, then photosensitive area percentage decreases, but manufacturing precision becomes more difficult to maintain
Solution Approach 1:
By segmenting the pixel cell circuitry across multiple substrates, the patent reduces the footprint of circuit elements on each individual substrate. This allows for reduced pixel pitch while maintaining adequate photosensitive area percentage and reducing processing variance through distributed manufacturing rather than monolithic fabrication.
3Length of stationary object
If multiple substrates are stacked to reduce pixel pitch, then pixel pitch decreases below 0.5 μm, but device complexity increases
Solution Approach 1:
The patent utilizes vertical stacking of multiple substrates to achieve reduced pixel pitch, moving the complexity management from the lateral plane to the vertical dimension. This allows high-resolution pixel pitch while distributing circuit complexity across multiple layers rather than requiring a single complex substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces process variance and enhances image sensor performance by enabling smaller pixel pitches without compromising the photosensitive area, improving sensitivity and density while maintaining performance consistency across devices.
Implementation Method 1
The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light
Data Source
AI summary
A pixel cell for an image sensor including a first semiconductor substrate, a photodiode, and a transfer gate is described. The first semiconductor substrate includes a first side and a second side. The first side is opposite the second side. The photodiode is disposed within the first semiconductor substrate between the first and the second side. The transfer gate is disposed proximate to the first side of the first semiconductor substrate. The transfer gate includes a planar region. The first side of the semiconductor substrate is disposed between the planar region and the photodiode. A lateral area of the photodiode is less than or equal to a lateral area of the planar region of the transfer gate.