Solid State Image Sensor Pixel Circuit Offset Voltage Control
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Solution Overview
Problem
Conventional high-speed solid-state image sensors face challenges in maintaining image quality due to variations in offset voltage and gain characteristics among picture elements, which degrade signal-to-noise ratio and aperture ratio, especially during ultrahigh-speed imaging.
Innovation Solution
The design includes a pixel area with each picture element having a built-in current source and a separate pixel output line, eliminating voltage drops and gain errors by dispersing current sources across the pixel area, and optionally using relay amplifiers and pixel-selecting switches to manage signal transfer and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If all picture elements are connected to memory-array units by separate column lines, then simultaneous signal transfer is achieved, but the wiring area becomes excessively large and aperture ratio decreases
Solution Approach 1:
The patent divides the pixel array into multiple banks, where each bank contains a subset of picture elements. Each bank is connected to memory-array units through a dedicated column line, rather than connecting all picture elements through a single shared column line. This segmentation allows parallel signal transfer from multiple banks simultaneously, achieving high-speed operation while reducing the number of column lines required compared to a fully separate connection architecture.
2Area of stationary object
If N picture elements share one common column line, then wiring area is reduced, but simultaneous signal transfer capability is lost
Solution Approach 1:
The patent segments the pixel array into multiple banks, with each bank having its own dedicated column line connection to memory-array units. This creates an intermediate architecture between fully shared and fully separate connections, enabling parallel transfer from multiple banks while using fewer column lines than individual connections for each pixel.
Solution Approach 2:
The patent introduces a bank dimension in addition to the row and column dimensions of the pixel array. By organizing pixels into banks that can be independently selected and transferred, the system adds a temporal dimension to the transfer operation, allowing different banks to be transferred in different time slots, thus achieving parallelism without requiring proportional increases in wiring.
3Area of moving object
If current sources are collectively arranged in a current-source area, then pixel size is reduced, but voltage drops and gain errors increase
Solution Approach 1:
The patent associates current sources with specific banks of picture elements rather than collecting all current sources in a single distant current-source area. Each bank's current sources are positioned closer to their corresponding picture elements, reducing the length of column lines and minimizing voltage drops and gain errors while still allowing compact arrangement within each bank's local area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the signal-to-noise ratio, improves image quality, and allows for higher imaging speeds while maintaining image quality, by reducing noise and power concentration on the sensor chip.
Implementation Method 1
each picture element including a photodiode, a detection node for converting a photocharge generated by the photodiode from an electric-charge signal into a voltage signal
Data Source
AI summary
A transistor (24) which acts as a load-current source for a source follower amplifying transistor (22) for outputting a pixel signal to a pixel output line (40) is provided in each picture element (10), whereby a high bias current is prevented from passing through the high-resistance pixel output line (40), so that a variation in an offset voltage among picture elements is suppressed. Inclusion of the high-resistance pixel output line (40) into the source follower amplification circuit is also avoided, whereby the gain characteristics are prevented from deterioration. Thus, the S/N ratio of the picture element is improved so as to enhance the quality of the images.