Image Sensor DAC Ramp Circuit for Fast Settling and Stable DC Level

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Solution Overview

Problem

Existing analog-to-digital converters in image sensors face issues with long settling times for ramp waves due to terminal resistance and parasitic capacitance, and dynamic changes in analog gain can lead to unstable DC levels, hindering efficient conversion.

Innovation Solution

A digital-analog conversion (DAC) circuit comprising a current source cell, current-voltage conversion circuit, voltage divider circuit, and amplifier circuit to generate a ramp signal, which reduces settling time and maintains a constant DC level by using a buffer-driven amplifier to stabilize the output voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a terminal resistance and parasitic capacitance are used in the existing DAC circuit, then the circuit structure is simple, but the settling time of the ramp wave becomes long

Engineering Contradiction:
Improvesettling timeVSAvoidcircuit structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the DAC circuit into multiple functional blocks: a first DAC circuit for generating a first ramp wave, a second DAC circuit for generating a second ramp wave, and an adder for combining them. This segmentation allows independent optimization of each block to reduce overall settling time while managing circuit complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a hierarchical structure where multiple DAC circuits are nested within a unified architecture. The first and second DAC circuits are integrated with shared components such as the current source cell and control logic, creating a nested configuration that reduces redundant elements and optimizes settling performance.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If the analog gain is dynamically changed in the existing DAC circuit, then the adaptability is improved, but the DC level of the output voltage becomes unstable

Engineering Contradiction:
Improveanalog gain dynamic changeVSAvoidDC level stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent employs feedback mechanisms where the output of the adder is fed back to control the operation of the first and second DAC circuits. This feedback ensures that when analog gain is dynamically adjusted, the DC levels of both ramp waves are properly managed to maintain a stable combined output, resolving the contradiction between adaptability and stability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent implements dynamic control of the DAC circuits where the first and second DAC circuits can independently adjust their ramp wave characteristics based on control signals. This dynamic operation allows the system to adapt gain settings while maintaining stable DC levels through coordinated control of multiple circuits rather than a single static circuit.

Inventive Principle:
Principle #15Dynamics

3Productivity

If a single DAC circuit is used in the existing design, then the device complexity is low, but the productivity of the ADC conversion process is reduced

Engineering Contradiction:
ImproveADC conversion efficiencyVSAvoidDAC circuit configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the ramp wave generation function into multiple parallel DAC circuits that operate simultaneously. The first DAC circuit generates a first ramp wave while the second DAC circuit generates a second ramp wave, and their combined output accelerates the ADC conversion process, improving productivity despite increased circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the outputs of multiple DAC circuits through an adder to produce a combined ramp signal. This combining approach allows the system to leverage the parallel processing capability of multiple circuits, achieving faster conversion speeds and improved productivity while managing complexity through integrated design.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The DAC circuit significantly reduces ramp wave settling time and maintains a stable DC level, enhancing the efficiency and accuracy of image sensor conversions.

Implementation Method 1

a current-voltage conversion circuit converting a signal variation of an output current of the current source cell into a first output voltage

Methodology Applied
Scientific EffectCurrent-voltage conversion: Ohm's Law

Implementation Method 2

a voltage divider circuit dividing the first output voltage of the current-voltage conversion circuit at a certain ratio and outputting a second output voltage

Methodology Applied
Scientific EffectVoltage division: Ohm's Law

Data Source

PatentUS20260075339A1Digital-to-analog conversion circuit, operating method thereof, and solid-state imaging device including the same
Publication Date: 2026.03.12 SAMSUNG ELECTRONICS CO LTD
  • US20260075339A1 patent drawing
  • US20260075339A1 patent drawing
  • US20260075339A1 patent drawing

AI summary

There is provided an imaging device including a digital-analog conversion (DAC) circuit including a current source cell, a current-voltage conversion circuit that converts a signal variation of an output current of the current source cell into a first output voltage, a voltage divider circuit that divides the first output voltage of the current-voltage conversion circuit at a certain ratio and output a second output voltage, and an amplifier circuit that amplifies the second output voltage of the voltage divider circuit by driving a buffer, and generates a ramp signal based on the amplified second output voltage.