CMOS Image Sensor Dark Current Suppressor Structure
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Solution Overview
Problem
CMOS image sensors suffer from dark current defects due to electron accumulation at crystal defects and dangling bonds, which are not adequately reduced by existing methods like annealing or P-type impurity doping, leading to persistent dark levels.
Innovation Solution
The implementation of a dark current suppressor doped with a second conductive type impurity on the side and bottom surfaces of the isolation layer, separated from the photodiode regions, effectively prevents electron diffusion and reduces dark current by discharging electron-hole pairs generated at the device isolation layer boundary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If P type impurities are heavily implanted under the device isolation layer, then dark current is reduced by preventing hole and electron pair diffusion, but electrons may still diffuse into the photodiode causing weak dark current and the process becomes complicated
Solution Approach 1:
A dark current suppressor layer is introduced as an intermediary structure between the isolation layer and the photodiode. This suppressor layer, formed by implanting P type impurities at a lower dose and at an angle, acts as a mediator that prevents electron diffusion into the photodiode while avoiding the complexity of heavy implantation under the isolation layer. The suppressor layer effectively blocks the diffusion path of electrons generated at the isolation layer boundary.
Solution Approach 2:
The dark current suppressor is formed with localized P type impurity implantation at specific regions - specifically at the boundary portion of the isolation layer where electrons are generated. The implantation is performed at a controlled angle (e.g., 45 degrees) and with a lower dose compared to conventional methods, creating a localized suppression zone that targets the exact problem area without affecting the entire device structure or requiring complicated manufacturing steps.
2Stability of the object's composition
If annealing process is performed after dry etching, then substrate stress is relieved, but dark level is not sufficiently reduced
Solution Approach 1:
The dark current suppressor layer is formed preliminarily before the isolation layer is completely finalized. By implanting P type impurities at the boundary portion at a lower dose and at an angle, the suppressor structure is established in advance to prevent electron diffusion. This preliminary action addresses the dark current issue before final device assembly, making additional annealing insufficient to reduce dark levels without the suppressor structure.
3Ease of manufacture
If isolation layer is formed by LOCOS process, then field region is defined, but boundary portion is under excessive thermal expansion stress
Solution Approach 1:
The method changes the impurity implantation parameters - specifically using a lower dose of P type impurities compared to conventional heavy implantation methods. The implantation is also performed at a controlled angle (e.g., 45 degrees) rather than perpendicular to the surface. These parameter changes create a suppressor layer that effectively blocks electron diffusion while reducing the stress on the boundary portion of the isolation layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces dark level defects in CMOS image sensors by preventing electron accumulation in the photodiode, thereby enhancing operational characteristics and reliability.
Implementation Method 1
A plurality of hole and electron pairs are generated in the image sensor due to Joule heat caused by repeated usage of the image sensor. A plurality of crystal defects and dangling bonds are generated at a boundary portion of the active region and the field region since excessive damage and thermal and/or mechanical stress are created at the boundary portion when forming the field region. Electrons are accumulated around the crystal defects and dangling bonds. A portion of the accumulated electrons is diffused into the photodiode so that the electrons are accumulated into the photodiode.
Implementation Method 2
When an isolation layer in a field region is formed by a local oxidation of silicon (LOCOS) process, a boundary portion of the isolation layer is under excessive stress due to a thermal expansion during the oxidation of a substrate.
Implementation Method 3
The STI process requires a dry etching process on a surface of a substrate. Due to the dry etching, the substrate in the STI process is under more excessive stress at a boundary portion adjacent to the isolation layer than the substrate in the LOCOS process.
Implementation Method 4
A surface of the substrate can be relieved of excessive stress by using an annealing process performed after the dry etching process.
Implementation Method 5
In a method of reducing the dark current, an image sensor is doped with P type impurities under a device isolation layer. When the P type impurities are heavily implanted under the device isolation layer, a hole and electron pair caused by heat is prevented from being diffused into the photodiode, thereby reducing the dark current.
Data Source
AI summary
An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.


