Image Sensor ADC With Dual-Slope Ramp for Faster High-Bit Conversion
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Solution Overview
Problem
Current CMOS image sensors face a trade-off between speed and power, and as the accuracy of analog-to-digital conversion increases, the time required for conversion also increases, making it challenging to efficiently convert pixel voltage into higher bit digital codes such as 12-bit or 14-bit codes.
Innovation Solution
The implementation of a ramp voltage generation circuit that changes slope in different sections to facilitate high-resolution digital code generation efficiently, using a combination of a ramp voltage generation circuit, an operation amplifier, and a counter circuit to generate digital codes by varying the slope of the ramp voltage in response to the pixel signal, allowing for high-resolution conversion in a shorter time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the accuracy of analog-to-digital conversion is increased, then the resolution of digital code is improved, but the time required for conversion increases
Solution Approach 1:
The conversion process is divided into two distinct phases: a first conversion phase using a first slope for initial conversion, and a second conversion phase using a second slope for refined conversion. This segmentation allows the system to achieve high-resolution conversion without requiring a single prolonged conversion period, thereby reducing overall conversion time while maintaining accuracy.
Solution Approach 2:
The patent dynamically changes the slope of the ramp voltage between two different values during the conversion process. By switching from a first slope to a second slope, the system adapts the conversion rate to achieve both speed and precision, resolving the contradiction between conversion time and accuracy.
2Measurement precision
If the bit depth of digital code is increased from 10-bit to 12-bit or 14-bit, then the resolution is improved, but the conversion time increases significantly
Solution Approach 1:
The dual-slope conversion methodology segments the analog-to-digital conversion into two distinct phases with different slope characteristics. This allows high-bit-depth conversion (12-bit or 14-bit) to be achieved without proportionally increasing conversion time, as each phase contributes differently to the final resolution.
Solution Approach 2:
The patent changes the slope parameter of the ramp voltage between two different values during conversion. This parameter change enables the system to achieve higher bit-depth conversion with reduced time penalty, as the dual-slope approach optimizes the trade-off between resolution and conversion speed.
3Device complexity
If a single-slope ADC is used in narrow pixel width, then the device complexity is reduced, but the integration difficulty increases
Solution Approach 1:
The patent implements a dynamic dual-slope ADC structure that can be integrated into narrow pixel widths. By using operation amplifiers and controlled voltage sources that switch between two slope states, the design achieves dual-slope functionality with manageable complexity suitable for CMOS image sensor integration.
Data Source
AI summary
An image sensor includes: a pixel outputting a pixel signal; a ramp voltage generation circuit suitable for generating a ramp voltage that changes at a first slope in a first section and generating the ramp voltage that changes at a second slope having a greater absolute value than the first slope in a second section following the first section; an operation amplifier suitable for comparing the pixel signal with the ramp voltage during the first section and the second section; and a counter circuit suitable for generating a digital code corresponding to the pixel signal in response to an output of the operation amplifier.


