Image Sensor Pixel With Dual Transfer Gates for High-Speed Readout

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Solution Overview

Problem

Conventional image sensors with global shutter pixels face challenges in high-speed imaging due to limitations in pixel size, transfer time, and efficiency, particularly at frame rates exceeding 1 million frames per second, where the response time is hindered by charge transfer and readout constraints.

Innovation Solution

The implementation of a pixel design with dual transfer gates and a gradient electric field within the photodiode, allowing for simultaneous charge transfer and continuous readout without vertical blank time, utilizing buried n-implants to accelerate charge transfer and reduce response time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional single transfer gate pixels are used, then device complexity is reduced, but response time increases and frame rate is limited below 1 million fps

Engineering Contradiction:

Improveframe rateVSAvoidpixel structure

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The pixel is divided into multiple independent transfer gates (first transfer gate and second transfer gate) that can operate independently. This segmentation allows parallel charge transfer operations, enabling the pixel to achieve frame rates exceeding 1 million fps by transferring charge packets through different paths simultaneously, thus resolving the contradiction between speed and complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension to the charge transfer process by implementing alternating transfer cycles between two transfer gates. While one transfer gate is active, the other is in a different state, creating a time-multiplexed operation that effectively doubles the data rate without proportionally increasing physical complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Speed

If faster charge transfer is implemented to increase frame rate, then response time improves, but transfer time for individual packets increases

Engineering Contradiction:

Improveresponse timeVSAvoidtransfer time

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The dual transfer gate structure enables continuous charge transfer operations without interruption. While one transfer gate is transferring charge, the other can be preparing or resetting, eliminating idle time and ensuring continuous useful action. This continuity improves response time while maintaining efficient transfer time utilization.

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The patent implements periodic switching between two transfer gates in alternating cycles. This periodic action allows the system to maintain a high average transfer rate by constantly switching between active and standby states, improving overall response time without extending individual transfer durations.

Inventive Principle:

Principle #19Periodic action

3Productivity

If multiple column readout lines are used per column of pixels, then readout efficiency increases, but device complexity increases

Engineering Contradiction:

Improvereadout efficiencyVSAvoidreadout circuitry

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Each transfer gate is designed with multi-functionality, serving both as a charge transfer path and as a readout channel. The first and second transfer gates can independently output charge packets to separate column readout lines, allowing the same structural element to perform multiple functions and improving readout efficiency without proportionally increasing overall device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables lag-free operation at higher frame rates by optimizing charge transfer and readout efficiency, allowing for double data rate readout and improved performance in high-speed imaging applications.

Implementation Method 1

Each pixel 3 includes a light sensitive element, such as a photodiode, or the like, to sample light intensity of a corresponding portion of a scene being imaged

Methodology Applied

Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

a pixel design with dual transfer gates and a gradient electric field within the photodiode, allowing for simultaneous charge transfer and continuous readout

Methodology Applied

Scientific EffectElectric field: Electric Field

Data Source

PatentUS9363456B2Image sensors and methods with multiple column readout lines for a column of pixels multiplexed together for output

Publication Date: 2016.06.07 LUXIMA TECHNOLOGY LLC

AI summary

An image sensor includes a plurality of pixels and a row driver. Each pixel includes a photodiode, a first transfer gate, a second transfer gate, a first storage node, and a second storage node. The row driver is configured to provide signals to the first transfer gate and the second transfer gate of each pixel such that charge is transferred from the photodiode to the first storage node through the first transfer gate while a signal representing charge stored at the second storage node is output from the pixel to a column readout line. The row driver is also configured to provide signals to the first transfer gate and the second transfer gate such that charge is transferred from the photodiode to the second storage node through the second transfer gate while a signal representing charge stored at the first storage node is output from the pixel.